Hendra Kwantono

According to our database, Hendra Kwantono authored at least 3 papers between 2011 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS.

Chang-Hyeon Lee, Lindel Kabalican, Yan Ge, Hendra Kwantono, Greg Unruh, Mark Chambers, Ichiro Fujimori

IEEE J. Solid State Circuits, 2015

2014

A 2.7GHz to 7GHz fractional-N LCPLL utilizing multimetal layer SoC technology in 28nm CMOS.

Chang-Hyeon Lee, Lindel Kabalican, Yan Ge, Hendra Kwantono, Greg Unruh, Mark Chambers, Ichiro Fujimori

Proceedings of the Symposium on VLSI Circuits, 2014

2011

A 4.7 µA Quiescent Current, 450 mA CMOS Low-Dropout Regulator with Fast Transient Response.

Sau Siong Chong, Hendra Kwantono, Pak Kwong Chan

IEICE Trans. Electron., 2011