Hemanta Kumar Mondal
Orcid: 0000-0002-9403-4724
According to our database1,
Hemanta Kumar Mondal
authored at least 44 papers
between 2013 and 2025.
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Bibliography
2025
Enhancing predictive accuracy using machine learning for network-on-chip performance modeling.
Comput. Electr. Eng., 2025
2024
J. Supercomput., November, 2024
Easydiagnos: a framework for accurate feature selection for automatic diagnosis in smart healthcare.
CoRR, 2024
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024
Consequence of Various Clock Parameters on Power / Timing Analysis for VLSI Circuits.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024
2023
Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023
2022
Sustain. Comput. Informatics Syst., 2022
ACM J. Emerg. Technol. Comput. Syst., 2022
VAR-DRAM: Variation-Aware Framework for Efficient Dynamic Random Access Memory Design.
CoRR, 2022
2021
IEEE Trans. Emerg. Top. Comput., 2021
iKardo: An Intelligent ECG Device for Automatic Critical Beat Identification for Smart Healthcare.
IEEE Trans. Consumer Electron., 2021
Designing Efficient NoC-Based Neural Network Architectures for Identification of Epileptic Seizure.
SN Comput. Sci., 2021
2020
Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2020
Classification of ECG Signals for IoT-based Smart Healthcare Applications using WBAN.
Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020
Proceedings of the 3rd International Symposium on Devices, Circuits and Systems, 2020
Broadcast Mechanism Based on Hybrid Wireless/Wired NoC for Efficient Barrier Synchronization in Parallel Computing.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
CDMA-based multiple multicast communications on WiNOC for efficient parallel computing.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
2018
Broadcast- and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Accurate Channel Models for Realistic Design Space Exploration of Future Wireless NoCs.
Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018
High Bandwidth Off-Chip Memory Access Through Hybrid Switching and Inter-Chip Wireless Links.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Adaptive Multi-Voltage Scaling with Utilization Prediction for Energy-Efficient Wireless NoC.
IEEE Trans. Sustain. Comput., 2017
IEEE Trans. Multi Scale Comput. Syst., 2017
P<sup>2</sup>NoC: Power- and Performance-aware NoC Architectures for Sustainable Computing.
Sustain. Comput. Informatics Syst., 2017
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017
Path loss-aware adaptive transmission power control scheme for energy-efficient wireless NoC.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017
2016
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Adaptive multi-voltage scaling in wireless NoC for high performance low power applications.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
A Hardware and Thermal Analysis of DVFS in a Multi-core System with Hybrid WNoC Architecture.
Proceedings of the 28th International Conference on VLSI Design, 2015
Power- and performance-aware fine-grained reconfigurable router architecture for NoC.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
2014
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014
Proceedings of the 25nd IEEE International Symposium on Rapid System Prototyping, 2014
An Efficient Hardware Implementation of DVFS in Multi-core System with Wireless Network-on-Chip.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
2013
Proceedings of the 8th International Design and Test Symposium, 2013