Hayun Chung

Orcid: 0000-0001-7901-9334

According to our database1, Hayun Chung authored at least 9 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
A 360-fs-Time-Resolution 7-bit Stochastic Time-to-Digital Converter With Linearity Calibration Using Dual Time Offset Arbiters in 65-nm CMOS.
IEEE J. Solid State Circuits, 2021

2014
ADC-Based Backplane Receiver Design-Space Exploration.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2012
A 0.025-0.45 W 60%-Efficiency Inductive-Coupling Power Transceiver With 5-Bit Dual-Frequency Feedforward Control for Non-Contact Memory Cards.
IEEE J. Solid State Circuits, 2012

A 10-Bit 80-MS/s Decision-Select Successive Approximation TDC in 65-nm CMOS.
IEEE J. Solid State Circuits, 2012

6 W/25 mm<sup>2</sup> Wireless Power Transmission for Non-contact Wafer-Level Testing.
IEICE Trans. Electron., 2012

Simultaneous data and power transmission using nested clover coils.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
6W/25mm<sup>2</sup> inductive power transfer for non-contact wafer-level testing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009
Design-space exploration of backplane receivers with high-speed ADCs and digital equalization.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A 12.5-Gbps, 7-bit transmit DAC with 4-tap LUT-based equalization in 0.13μm CMOS.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008


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