Hayssam El-Razouk

Orcid: 0000-0002-3452-5281

According to our database1, Hayssam El-Razouk authored at least 20 papers between 2006 and 2024.

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Bibliography

2024
Efficient Designs for the 8-Bit Approximate Fixed Point Multiplication.
Proceedings of the 14th IEEE Annual Computing and Communication Workshop and Conference, 2024

Smart Car Temperature Monitoring System Using SRAM-Based PUF Sensor.
Proceedings of the 14th IEEE Annual Computing and Communication Workshop and Conference, 2024

RFID-PIN Access Control System: Cost-Effective Security for Smart Home Applications.
Proceedings of the IEEE World AI IoT Congress, 2024

2023
Squeezing Area of the Versatile GF (2<sup>m</sup>) GNB Arithmetic Operators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023

Implementing Privacy on Public Digital Displays Using Smart Glasses.
Proceedings of the 13th IEEE Annual Computing and Communication Workshop and Conference, 2023

2022
Input-Latency Free Versatile Bit-Serial GF(2<sup>m</sup>) Polynomial Basis Multiplication.
IEEE Trans. Very Large Scale Integr. Syst., 2022

2021
Novel $GF\left(2^{m}\right)$GF2m Digit-Serial PISO Multipliers for the Self-Dual Gaussian Normal Bases.
IEEE Trans. Computers, 2021

Performance Analysis of Gaussian Normal Basis GF ($2^{m}$) Serial Multipliers and Inverters.
Proceedings of the 11th IEEE Annual Computing and Communication Workshop and Conference, 2021

2020
Horizontal Correlation Analysis of Elliptic Curve Diffie Hellman.
Proceedings of the 3rd International Conference on Information and Computer Technologies, 2020

2019
New Multiplicative Inverse Architectures Using Gaussian Normal Basis.
IEEE Trans. Computers, 2019

Novel Trace-Based Construction of the Parallel-In-Serial-Out Multiplication for Elliptic Curve Digital Signature Algorithm Like Binary Extension Fields.
Proceedings of the IEEE 9th Annual Computing and Communication Workshop and Conference, 2019

2017
A New Multiplicative Inverse Architecture in Normal Basis Using Novel Concurrent Serial Squaring and Multiplication.
Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

2016
New Architectures for Digit-Level Single, Hybrid-Double, Hybrid-Triple Field Multiplications and Exponentiation Using Gaussian Normal Bases.
IEEE Trans. Computers, 2016

2015
New Hardware Implementations of WG(29, 11) and WG-16 Stream Ciphers Using Polynomial Basis.
IEEE Trans. Computers, 2015

New Bit-Level Serial GF (2<sup>m</sup>) Multiplication Using Polynomial Basis.
Proceedings of the 22nd IEEE Symposium on Computer Arithmetic, 2015

2014
New Implementations of the WG Stream Cipher.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2008
Low power multipliers based on new hybrid full adders.
Microelectron. J., 2008

2006
Defect Tolerant Voter Designs Based on Transistor Redundancy.
J. Low Power Electron., 2006

A New Transistor-Redundant Voter for Defect-Tolerant Digital Circuits.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

Area and Power Efficient Array and Tree Multipliers.
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006


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