Hassen Aziza

Proceedings of the 25th IEEE Latin American Test Symposium, 2024

Robust Design-for-Testability Scheme for Conventional and Unique Defects in RRAMs.

[BibT_eX]

[DOI]

Hanzhi Xun

Mohammad Amin Yaldagard

Proceedings of the IEEE International Test Conference, 2024

Online Detection of Unique Faults in RRAMs.

[BibT_eX]

[DOI]

Hanzhi Xun

Mohammad Amin Yaldagard

Proceedings of the IEEE European Test Symposium, 2024

Power Consumption Reduction in Integrated Pacemakers: Design Strategies for Cortex-M0+ Processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Design, 2024

Design and Characterization of an Integrated Multi-Sensor Device for Air Quality Monitoring.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Design, 2024

Optimization of digital transistors for low-cost and low-power IoT applications in 40nm technology.

[BibT_eX]

[DOI]

Noemie Couzi

Proceedings of the IEEE International Conference on Design, 2024

Device-Aware Diagnosis for Yield Learning in RRAMs.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

Investigation of Single Event Effects in a Resistive RAM Memory Array by Coupling TCAD and SPICE Simulations.

[BibT_eX]

[DOI]

Letícia Maria Veiras Bolzani Poehls

J. Electron. Test., June, 2023

On the Reliability of RRAM-Based Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

Device-Aware Test for Ion Depletion Defects in RRAMs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2023

Cortex-M0+-based Pacemaker: CMOS Technologies Benchmark to Achieve Ultra-Low Power Operations.

[BibT_eX]

[DOI]

Proceedings of the 2023 IEEE International Conference on Design, 2023

Characterization and Test of Intermittent Over RESET in RRAMs.

[BibT_eX]

[DOI]

Mottaqiallah Taouil

Said Hamdioui

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

2022

Defects, Fault Modeling, and Test Development Framework for RRAMs.

[BibT_eX]

[DOI]

Guilherme Cardoso Medeiros

ACM J. Emerg. Technol. Comput. Syst., 2022

Digital-to-analog converters to benchmark the matching performance of a new zero-cost transistor.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability.

[BibT_eX]

[DOI]

Hussein Bazzi

Mathieu Moreau

Adnan Harb

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Schmitt trigger to benchmark the performance of a new zero-cost transistor.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021

Improving TID Radiation Robustness of a CMOS OxRAM-Based Neuron Circuit by Using Enclosed Layout Transistors.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

Performances and Stability Analysis of a Novel 8T1R Non-Volatile SRAM (NVSRAM) versus Variability.

[BibT_eX]

[DOI]

J. Electron. Test., 2021

Investigation of Single Event Effects in a Resistive RAM memory array by SPICE level simulation.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Latin American Test Symposium, 2021

Design Considerations Towards Zero-Variability Resistive RAMs in HRS State.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Latin American Test Symposium, 2021

Intermittent Undefined State Fault in RRAMs.

[BibT_eX]

[DOI]

Guilherme Cardoso Medeiros

Proceedings of the 26th IEEE European Test Symposium, 2021

Benchmarking and optimization of trench-based multi-gate transistors in a 40 nm non-volatile memory technology.

[BibT_eX]

[DOI]

Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021

Circuit-level evaluation of a new zero-cost transistor in an embedded non-volatile memory CMOS technology.

[BibT_eX]

[DOI]

Proceedings of the 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2021

Tutorial: Silicon Systems for Wireless LAN.

[BibT_eX]

[DOI]

Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

An Energy-Efficient Current-Controlled Write and Read Scheme for Resistive RAMs (RRAMs).

[BibT_eX]

[DOI]

IEEE Access, 2020

A CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace Applications.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020

Design of a Novel Hybrid CMOS Non-Volatile SRAM Memory in 130nm RRAM Technology.

[BibT_eX]

[DOI]

Proceedings of the 15th Design & Technology of Integrated Systems in Nanoscale Era, 2020

A Lightweight Reconfigurable RRAM-based PUF for Highly Secure Applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation.

[BibT_eX]

[DOI]

Hussein Bazzi

Mathieu Moreau

Adnan Harb

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

2019

Configurable Operational Amplifier Architectures Based on Oxide Resistive RAMs.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2019

RRAM Device Models: A Comparative Analysis With Experimental Validation.

[BibT_eX]

[DOI]

IEEE Access, 2019

True random number generation exploiting SET voltage variability in resistive RAM memory arrays.

[BibT_eX]

[DOI]

Proceedings of the 19th Non-Volatile Memory Technology Symposium, 2019

A Capacitor-Less CMOS Neuron Circuit for Neuromemristive Networks.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Device-Aware Test: A New Test Approach Towards DPPB Level.

[BibT_eX]

[DOI]

Guilherme Cardoso Medeiros

Lizhou Wu

Proceedings of the IEEE International Test Conference, 2019

An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits.

[BibT_eX]

[DOI]

Hussein Bazzi

Pierre Canet

Mathieu Moreau

Adnan Harb

Proceedings of the 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2019

2018

A lightweight write-assist scheme for reduced RRAM variability and power.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2018

An Ultra-Low Power and High Performance Single Ended Sense Amplifier for Low Voltage Flash Memories.

[BibT_eX]

[DOI]

J. Low Power Electron., 2018

Reliable ReRAM-based Logic Operations for Computing in Memory.

[BibT_eX]

[DOI]

Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Using short-term fourier transform for particle detection and recognition in a CMOS oscillator-based chain.

[BibT_eX]

[DOI]

Remy Vauche

Proceedings of the 19th IEEE Latin-American Test Symposium, 2018

Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Microelectronics, 2018

Memristor models optimization for large-scale 1T1R memory arrays.

[BibT_eX]

[DOI]

Proceedings of the 2018 International Conference on IC Design & Technology, 2018

Novel RRAM CMOS Non-Volatile Memory Cells in 130nm Technology.

[BibT_eX]

[DOI]

Proceedings of the 2018 International Conference on Computer and Applications (ICCA), 2018

A configurable operational amplifier based on oxide resistive RAMs.

[BibT_eX]

[DOI]

Christian Dufaza

Annie Pérez

Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

2017

A Power Efficient Regulated Charge Pump Based on Charge Sharing for Contactless Devices: An Alternative to Four-Phase Charge Pumps.

[BibT_eX]

[DOI]

J. Low Power Electron., 2017

High voltage recycling scheme to improve power consumption of regulated charge pumps.

[BibT_eX]

[DOI]

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Power efficiency optimization of charge pumps in embedded low voltage NOR flash memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

An Ultra-Low Power and High Speed Single Ended Sense Amplifier for Non-Volatile Memories.

[BibT_eX]

[DOI]

Proceedings of the New Generation of CAS, 2017

Oxide-based RRAM models for circuit designers: A comparative analysis.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017

2016

Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories.

[BibT_eX]

[DOI]

Pierre Canet

Microelectron. Reliab., 2016

Resistive RAM variability monitoring using a ring oscillator based test chip.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2016

Optimization of a Particles Detection Chain Based on a VCO Structure.

[BibT_eX]

[DOI]

J. Electron. Test., 2016

Multilevel operation in oxide based resistive RAM with SET voltage modulation.

[BibT_eX]

[DOI]

Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

2015

Improvement of MOSFET matching characterization with calibrated multiplexed test structure.

[BibT_eX]

[DOI]

Loic Welter

J. L. Scotto di Quaquero

Microelectron. Reliab., 2015

Low cost built-in-tuning of on-chip passive filters for low-if double quadrature rf receiver.

[BibT_eX]

[DOI]

Proceedings of the 16th Latin-American Test Symposium, 2015

Improvement of a detection chain based on a VCO concept for microelectronic reliability under natural radiative environment.

[BibT_eX]

[DOI]

Proceedings of the 16th Latin-American Test Symposium, 2015

2014

Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2014

Low Power Radio Frequency Transceiver with Built-In-Tuning of the Local Oscillator for Open Loop Modulation.

[BibT_eX]

[DOI]

J. Low Power Electron., 2014

Improvement of a VCO concept for low energy particule detection and recognition.

[BibT_eX]

[DOI]

Proceedings of the 15th Latin American Test Workshop, 2014

An innovative standard cells remapping method for in-circuit critical parameters monitoring.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Nonvolatile memories: Present and future challenges.

[BibT_eX]

[DOI]

Elena I. Vatajelu

Cristian Zambelli

Proceedings of the 9th International Design and Test Symposium, 2014

Accurate multiplexed test structure for threshold voltage matching evaluation.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014

Oxide based resistive RAM: ON/OFF resistance analysis versus circuit variability.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2013

A novel test structure for OxRRAM process variability evaluation.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2013

On the investigation of built-in tuning of RF receivers using on-chip polyphase filters.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Synchronous full-adder based on complementary resistive switching memory cells.

[BibT_eX]

[DOI]

Yue Zhang

Erya Deng

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Analytical study of complementary memristive synchronous logic gates.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

Built-in tuning of the local oscillator for open loop modulation of low cost, low power RF transceiver.

[BibT_eX]

[DOI]

Proceedings of the 14th Latin American Test Workshop, 2013

SPICE level analysis of Single Event Effects in an OxRRAM cell.

[BibT_eX]

[DOI]

Marc Bocquet

Christophe Muller

Proceedings of the 14th Latin American Test Workshop, 2013

Embedded high-precision frequency-based capacitor measurement system.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

Single-ended sense amplifier robustness evaluation for OxRRAM technology.

[BibT_eX]

[DOI]

Proceedings of the 8th International Design and Test Symposium, 2013

Low-cost auto-calibration of passive polyphase filter in image reject receiver.

[BibT_eX]

[DOI]

Jamel Nebhen

Hervé Barthélemy

Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012

Optimization of SEU Simulations for SRAM Cells Reliability under Radiation.

[BibT_eX]

[DOI]

J. Electron. Test., 2012

Crossbar architecture based on 2R complementary resistive switching memory cell.

[BibT_eX]

[DOI]

Weisheng Zhao

Yue Zhang

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

SITARe: A simulation tool for analysis and diagnosis of radiation effects.

[BibT_eX]

[DOI]

Proceedings of the 13th Latin American Test Workshop, 2012

Built-in tuning of RFIC Passive Polyphase Filter by process and thermal monitoring.

[BibT_eX]

[DOI]

Proceedings of the 13th Latin American Test Workshop, 2012

Investigation of a CMOS oscillator concept for particle detection and diagnosis.

[BibT_eX]

[DOI]

Proceedings of the 13th Latin American Test Workshop, 2012

2011

Back-end soft and hard defect monitoring using a single test chip.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2011

Matching degradation of threshold voltage and gate voltage of NMOSFET after Hot Carrier Injection stress.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2011

Impact of SEU configurations on a SRAM cell response at circuit level.

[BibT_eX]

[DOI]

Proceedings of the 12th Latin American Test Workshop, 2011

Analysis of SEU parameters for the study of SRAM cells reliability under radiation.

[BibT_eX]

[DOI]

Proceedings of the 12th Latin American Test Workshop, 2011

Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold area.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Bipolar OxRRAM memory array reliability evaluation based on fault injection.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Design and Test Workshop, 2011

2010

Simulation of intrinsic bipolar transistor mechanisms for future capacitor-less eDRAM on bulk substrate.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

An on-line testing scheme for repairing purposes in Flash memories.

[BibT_eX]

[DOI]

Olivier Ginez

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008

A Novel Low Power Oriented Design Methodology for Analog Blocks.

[BibT_eX]

[DOI]

J. Low Power Electron., 2008

A High-Speed Structural Method for Testing Address Decoder Faults in Flash Memories.

[BibT_eX]

[DOI]

Olivier Ginez

Proceedings of the 2008 IEEE International Test Conference, 2008

A novel design methodology for current reference circuits.

[BibT_eX]

[DOI]

Emmanuel Bergeret

Annie Pérez

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

An Automated Design Methodology for Charge Pump Circuits.

[BibT_eX]

[DOI]

Emmanuel Bergeret

Annie Pérez

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2005

EEPROM Diagnosis Based on Threshold Voltage Embedded Measurement.

[BibT_eX]

[DOI]

Didier Née

J. Electron. Test., 2005

2003

EEPROM Memory: Threshold Voltage Built In Self Diagnosis.

[BibT_eX]

[DOI]