Hassan Salmani

Orcid: 0000-0002-4863-2934

According to our database1, Hassan Salmani authored at least 27 papers between 2005 and 2022.

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Bibliography

2022
Trust-Hub Trojan Benchmark for Hardware Trojan Detection Model Creation using Machine Learning.
Dataset, September, 2022

Gradual-N-Justification (GNJ) to Reduce False-Positive Hardware Trojan Detection in Gate-Level Netlist.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Session details: Session 6B: Special Session - 2: Application-oriented Hardware Security Challenges and Solutions.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

The Improved COTD Technique for Hardware Trojan Detection in Gate-level Netlist.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021
Experimental Data Anomaly Detection at Edge Sensor Nodes Using Physics Laws.
J. Hardw. Syst. Secur., 2021

2019
Special Session: Countering IP Security threats in Supply chain.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019

2018
Programmable Gates Using Hybrid CMOS-STT Design to Prevent IC Reverse Engineering.
ACM Trans. Design Autom. Electr. Syst., 2018

2017
COTD: Reference-Free Hardware Trojan Detection and Recovery Based on Controllability and Observability in Gate-Level Netlist.
IEEE Trans. Inf. Forensics Secur., 2017

Benchmarking of Hardware Trojans and Maliciously Affected Circuits.
J. Hardw. Syst. Secur., 2017

2016
Vulnerability Analysis of a Circuit Layout to Hardware Trojan Insertion.
IEEE Trans. Inf. Forensics Secur., 2016

Reliability analysis of spin transfer torque based look up tables under process variations and NBTI aging.
Microelectron. Reliab., 2016

Comparative analysis of hybrid Magnetic Tunnel Junction and CMOS logic circuits.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

Preventing design reverse engineering with reconfigurable spin transfer torque LUT gates.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Comparative analysis of robustness of spin transfer torque based look up tables under process variations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Dynamic single and Dual Rail spin transfer torque look up tables with enhanced robustness under CMOS and MTJ process variations.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Hybrid STT-CMOS designs for reverse-engineering prevention.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2013
On design vulnerability analysis and trust benchmarks development.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Analyzing circuit vulnerability to hardware Trojan insertion at the behavioral level.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

2012
A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Layout-Aware Switching Activity Localization to Enhance Hardware Trojan Detection.
IEEE Trans. Inf. Forensics Secur., 2012

Layout-Aware Pattern Evaluation and Analysis for Power-Safe Application of Transition Delay Fault Patterns.
J. Low Power Electron., 2012

2011
Trustworthy Hardware: Trojan Detection and Design-for-Trust Challenges.
Computer, 2011

2010
A layout-aware approach for improving localized switching to detect hardware Trojans in integrated circuits.
Proceedings of the 2010 IEEE International Workshop on Information Forensics and Security, 2010

2009
New Design Strategy for Improving Hardware Trojan Detection and Reducing Trojan Activation Time.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2009

2008
Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2005
Contribution of Controller Area Networks Controllers to Masquerade Failures.
Proceedings of the 11th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2005), 2005

Assessment of Message Missing Failures in CAN-based Systems.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2005


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