Hassan Mostafa

Orcid: 0000-0003-0043-5007

Affiliations:
  • Cairo University, Faculty of Engineering, Egypt
  • Zewail City of Science and Technology, Nanotechnology Program, Cairo, Egypt
  • University of Waterloo, ON, Canada (PhD 2011)


According to our database1, Hassan Mostafa authored at least 243 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

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Bibliography

2024
Beamwidth Design Tradeoffs in Radar-Aided Millimeter-Wave Cellular Networks: A Stochastic Geometry Approach.
IEEE Access, 2024

A Low-Power 64Gb/s PAM4 Transmitter in 65nm CMOS.
Proceedings of the 6th Novel Intelligent and Leading Emerging Sciences Conference, 2024

Invited Paper: A Pseudo-Differential Architecture for Low-Power Voltage-to-Time Converters.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2023
Ultra-Reliable Device-Centric Uplink Communications in Airborne Networks: A Spatiotemporal Analysis.
IEEE Trans. Veh. Technol., July, 2023

A low footprint olive grove weather forecasting using a single-layered seasonal attention encoder-decoder model.
Ecol. Informatics, July, 2023

Mobile Aerial Base Stations for Ultra-Reliable and Energy-Efficient Downlink Communications.
Proceedings of the IEEE International Conference on Smart Mobility, 2023

TimeFusionNet for End-to-End Self-Driving Cars.
Proceedings of the 5th Novel Intelligent and Leading Emerging Sciences Conference, 2023

Mini-YOLOX: A Lightweight Network for Real-Time Embedded Applications.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Efficient ASIC Implementation for Satellite-IoT Security Co-processor.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023

SoC-Oriented Implementation of Machine Learning Based Breast Cancer Classification Algorithm.
Proceedings of the 12th Mediterranean Conference on Embedded Computing, 2023

Low Power Microarchitecture Designs of ACS Block in Viterbi Decoder: A Review.
Proceedings of the 13th International Conference on Information Communication and Management, 2023

A Stochastic Geometry Analysis for Joint Radar Communication System in Millimeter-wave Band.
Proceedings of the IEEE International Conference on Communications, 2023

2022
A Novel Refreshment Circuit for 2T1M Neuromorphic Synapse.
J. Circuits Syst. Comput., 2022

Data Aggregation in Regular Large-Scale IoT Networks: Granularity, Reliability, and Delay Tradeoffs.
IEEE Internet Things J., 2022

Energy-Efficient Precision-Scaled CNN Implementation With Dynamic Partial Reconfiguration.
IEEE Access, 2022

2T1M Neuromorphic Synapse with Pt-Hf-Ti Memristor Model.
Proceedings of the Advances in System-Integrated Intelligence, 2022

Design and Simulation of a Novel Low-Voltage RF MEMS Switch for Reconfigurable Antennas.
Proceedings of the Advances in System-Integrated Intelligence, 2022

Efficient Hardware/Software Implementation for GoogLeNet Using Xilinx SDSoC.
Proceedings of the 4th Novel Intelligent and Leading Emerging Sciences Conference, 2022

Towards a Generic UVM.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

2021
Design of a reconfigurable network-on-chip for next generation FPGAs using Dynamic Partial Reconfiguration.
Microelectron. J., 2021

Functional Verification of Dynamic Partial Reconfiguration for Software-Defined Radio.
J. Circuits Syst. Comput., 2021

A 0.002-mm2 8-bit 1-MS/s low-power time-based DAC (T-DAC).
IET Circuits Devices Syst., 2021

Data Aggregation in Synchronous Large-scale IoT Networks: Granularity, Reliability, and Delay Tradeoffs.
CoRR, 2021

A Novel Companding Technique to Reduce High Peak to Average Power Ratio in OFDM Systems.
IEEE Access, 2021

Hardware Acceleration of High Sensitivity Power-Aware Epileptic Seizure Detection System Using Dynamic Partial Reconfiguration.
IEEE Access, 2021

Power Efficient Design of High-Performance Convolutional Neural Networks Hardware Accelerator on FPGA: A Case Study With GoogLeNet.
IEEE Access, 2021

A 10 Gb/s SerDes Transceiver.
Proceedings of the 3rd Novel Intelligent and Leading Emerging Sciences Conference, 2021

ASIC-FPGA Gap for a RISC-V Core Implementation for DNN Applications.
Proceedings of the 3rd Novel Intelligent and Leading Emerging Sciences Conference, 2021

Guava Trees Disease Monitoring Using the Integration of Machine Learning and Predictive Analytics.
Proceedings of the 3rd Novel Intelligent and Leading Emerging Sciences Conference, 2021

FPGA Design of High-Speed Convolutional Neural Network Hardware Accelerator.
Proceedings of the 3rd Novel Intelligent and Leading Emerging Sciences Conference, 2021

Low Power, Dual Mode Bluetooth 5.1/Bluetooth Low Energy Receiver Design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Deep Learning Modulation Recognition for RF Spectrum Monitoring.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Design Optimization of Multi-Input Reconfigurable Capacitive DC-DC Converters: A CAD Tool Approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Efficient HLS Implementation for Convolutional Neural Networks Accelerator on an SoC.
Proceedings of the International Conference on Microelectronics, 2021

Fast RTL Implementation of A* Path Planning Algorithm.
Proceedings of the International Conference on Microelectronics, 2021

High Accuracy Epileptic Seizure Detection System Based on Wearable Devices Using Support Vector Machine Classifier.
Proceedings of the International Conference on Microelectronics, 2021

Hardware-Accelerated ZYNQ-NET Convolutional Neural Networks on Virtex-7 FPGA.
Proceedings of the International Conference on Microelectronics, 2021

Implementation and Functional Verification of RISC-V Core for Secure IoT Applications.
Proceedings of the International Conference on Microelectronics, 2021

Design and Implementation of Authenticated Encryption Co-Processors for Satellite Hardware Security.
Proceedings of the International Conference on Microelectronics, 2021

A Lightweight Deep Learning Framework for Long-Term Weather Forecasting in Olive Precision Agriculture.
Proceedings of the International Conference on Microelectronics, 2021

2020
A high-efficiency piezoelectric-based integrated power supply for low-power platforms.
Microelectron. J., 2020

A high precision write/read circuits for memristors using digital input/output interfaces.
Microelectron. J., 2020

Smart Home IoT System by Using RF Energy Harvesting.
J. Sensors, 2020

Design of the Baseband Physical Layer of NarrowBand IoT LTE Uplink Digital Transmitter.
J. Circuits Syst. Comput., 2020

Automated performance-based design technique for an efficient LTE PDSCH implementation using SDSoC tool.
Int. J. Commun. Syst., 2020

Comparative Study of Hardware Accelerated Convolution Neural Network on PYNQ Board.
Proceedings of the 2nd Novel Intelligent and Leading Emerging Sciences Conference, 2020

Energy-Efficient Near-Threshold Standard Cell Library for IoT Applications.
Proceedings of the 2nd Novel Intelligent and Leading Emerging Sciences Conference, 2020

Low power and area SHA-256 hardware accelerator on Virtex-7 FPGA.
Proceedings of the 2nd Novel Intelligent and Leading Emerging Sciences Conference, 2020

IPXACT-Based RTL Generation Tool.
Proceedings of the 2nd Novel Intelligent and Leading Emerging Sciences Conference, 2020

Investigation of DW Spintronic Memristor performance in 2T1M Neuromorphic Synapse.
Proceedings of the 2nd Novel Intelligent and Leading Emerging Sciences Conference, 2020

Energy Adaptive Convolution Neural Network Using Dynamic Partial Reconfiguration.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Efficient ASIC Implementation of a NB-IoT Security Co-processor.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Implementation of a Hardware Accelerator for a Real-time Encryption System.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Digital calibration for SAR-CD TDC.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

Design and Analysis of Multi-Port SAW MEMS Resonators.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

Dynamically Reconfigurable Resource Efficient AES Implementation for IoT Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Multi-Partitioned Software Defined Radio Transceiver Based on Dynamic Partial Reconfiguration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Design Trade-Offs for Neural Stimulators Optimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Enabling the 5G: Modelling and Design of High Q Film Bulk Acoustic Wave Resonator (FBAR) for High Frequency Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Patient Specific Epileptic Seizures Prediction based on Support Vector Machine.
Proceedings of the 32nd International Conference on Microelectronics, 2020

Mechanical Analysis of Human DBS Electrodes.
Proceedings of the 32nd International Conference on Microelectronics, 2020

Hardware Acceleration of Dash Mining Using Dynamic Partial Reconfiguration on the ZYNQ Board.
Proceedings of the 32nd International Conference on Microelectronics, 2020

2019
Low-Power Hardware Implementation of a Support Vector Machine Training and Classification for Neural Seizure Detection.
IEEE Trans. Biomed. Circuits Syst., 2019

A Generalized Framework for the Performance Evaluation of Microwave Photonic Assisted IR-UWB Waveform Generators.
IEEE Syst. J., 2019

RF Energy Harvesting IoT System for Museum Ambience Control with Deep Learning.
Sensors, 2019

Design exploration for network on chip based FPGAs: 2D and 3D tiles to router interface.
Microelectron. J., 2019

Power adaptive high-resolution neural data compression algorithm (PANDCA).
Microelectron. J., 2019

Complete Study for Diagonal Triboelectric Nanogenerators Based Energy Harvester with Computer Aided Design Tool.
J. Low Power Electron., 2019

Low Area and Low Power Implementation for Competition for Authenticated Encryption, Security, Applicability, and Robustness Authenticated Ciphers.
J. Low Power Electron., 2019

ASIC and FPGA Comparative Study for IoT Lightweight Hardware Security Algorithms.
J. Circuits Syst. Comput., 2019

FPGA implementation of dynamically reconfigurable IoT security module using algorithm hopping.
Integr., 2019

An accurate model of domain-wall-based spintronic memristor.
Integr., 2019

A Generalized Geo-Electro-Mechanical Model for Triboelectric NanoGenerators.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Performance Evaluation of RZF Precoding in Multi-User MIMO Systems.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Memristor-Based AES Key Generation for Low Power IoT Hardware Security Modules.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Remote FPGA Lab For ZYNQ and Virtex-7 Kits.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Nondestructive Reading and Refreshment Circuit for Memristor-based Neuromorphic Synapse.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Comparison of Artificial Neural Network(ANN) and Support Vector Machine(SVM) Classifiers for Neural Seizure Detection.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Design of Microscale Piezoelectric Energy Harvesting System.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Complete Security Stack FPGA Implementation of The Software Defined Radio on ZYNQ.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Multiple Input-Multiple Output Visible Light Communication System Design Based on Optical Orthogonal Codes.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

A Smart Indoor Navigation System Over BLE.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Performance Comparison of Companding-Based PAPR Suppression Techniques in OFDM Systems.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Interfacing USRP Kit with Zynq-7000 Evaluation Kit.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Demonstration of Forward Collision Avoidance Algorithm Based on V2V Communication.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Hardware Accelerated Epileptic Seizure Detection System Using Support Vector Machine.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Low utilization FPGA implementation of OFDM transceiver based on IEEE 802.11n standard.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Smart IoT Monitoring System for Agriculture with Predictive Analysis.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Optimal EEG Window Size for Neural Seizure Detection.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Breast Cancer Diagnosis Using Image Processing and Machine Learning for Elastography Images.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019

Energy-Adaptive Lightweight Hardware Security Module using Partial Dynamic Reconfiguration for Energy Limited Internet of Things Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Accelerated Software Implementation of Authenticated Encryption Stream Ciphers for High Speed Applications.
Proceedings of the 31st International Conference on Microelectronics, 2019

Hardware Implementation of a Low Power Memristor-Based Voltage Controlled Oscillator.
Proceedings of the 31st International Conference on Microelectronics, 2019

Development of a Generic and a Reconfigurable UVM-Based Verification Environment for SoC Buses.
Proceedings of the 31st International Conference on Microelectronics, 2019

Low power CNN hardware FPGA implementation.
Proceedings of the 31st International Conference on Microelectronics, 2019

Design Optimization Methodology for High-Efficiency RF-to-DC Converters.
Proceedings of the 31st International Conference on Microelectronics, 2019

Automated Current Mirror Layout (ACML) Tool.
Proceedings of the 31st International Conference on Microelectronics, 2019

Comparative Study for Some Memristor models in Different Circuit Applications.
Proceedings of the 31st International Conference on Microelectronics, 2019

Seizure Prediction & Segmentation Merge Yielding a Boosted Low Power Model.
Proceedings of the 31st International Conference on Microelectronics, 2019

End-to-End Crash Avoidance Deep IoT-based Solution.
Proceedings of the 31st International Conference on Microelectronics, 2019

2018
Dual Split-Merge: A high throughput router architecture for FPGAs.
Microelectron. J., 2018

Dynamic power estimation using Transaction Level Modeling.
Microelectron. J., 2018

A Low-Power High-Efficiency Inductive Link Power Supply for Neural Recording and Stimulation System-on-Chip.
J. Low Power Electron., 2018

Technology Scaling Roadmap for FinFET-Based FPGA Clusters Under Process Variations.
J. Circuits Syst. Comput., 2018

NoC-DPR: A new simulation tool exploiting the Dynamic Partial Reconfiguration (DPR) on Network-on-Chip (NoC) based FPGA.
Integr., 2018

Optimizing FPGA-based hard networks-on-chip by minimizing and sharing resources.
Integr., 2018

A Compact Low-Power Mitchell-Based Error Tolerant Multiplier.
Proceedings of the 2018 New Generation of CAS, 2018

Constructing Effective UVM Testbench for DRAM Memory Controllers.
Proceedings of the 2018 New Generation of CAS, 2018

Real-Time Lane Detection-Based Line Segment Detection.
Proceedings of the 2018 New Generation of CAS, 2018

A Software Defined Radio Transceiver Based on Dynamic Partial Reconfiguration.
Proceedings of the 2018 New Generation of CAS, 2018

Diagonal Mode: A New Mode for Triboelectric Anogenerators Energy Harvesters.
Proceedings of the 2018 New Generation of CAS, 2018

Low Area and Low Power Implementation for CAESAR Authenticated Ciphers.
Proceedings of the 2018 New Generation of CAS, 2018

A New CAD Tool for Energy Optimization of Diagonal Motion Mode of Attached Electrode Triboelectric Nanogenerators.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

A Low Power CORDIC-Based Hardware Implementation of Izhikevich Neuron Model.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

Utilizing Dynamic Partial Reconfiguration to Reduce the Cost of FPGA Debugging.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

In-Out Cylindrical Triboelectric Nanogenerators Based Energy Harvester.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Dual-Mode Forward Collision Avoidance Algorithm Based on Vehicle-to-Vehicle (V2V) Communication.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Evaluation and Optimization of The Bit Rate Distance Relationships in IR-UWBoF Systems.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A Compact UWB Antenna Design for Indoor Wireless Applications.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Modified CONNECT: New Bufferless Router for NoC-Based FPGAs.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Peak-to-Average Power Ratio Suppression using Companding schemes in OFDM Systems.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A New Read Circuit for Multi-Bit Memristor-Based Memories based on Time to Digital Sensing Circuit.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

An Approximate Multiplier Based Hardware Implementation of the Izhikevich Model.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A Low-Power Time-Domain Comparator for IoT Applications.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Linear and Nonlinear Feature Extraction for Neural Seizure Detection.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

ASIC Oriented Comparative Analysis Of Biologically Inspired Neuron Models.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Automatic Clock Domain Crossing Verification Flow For Dynamic Partial Reconfiguration.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

On the Functional Verification of Dynamic Partial Reconfiguration.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

LTE Handover Parameters Optimization Using Q-Learning Technique.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Experimental study of the Adaptive Body Bias on-Chip (ABBoC) for bias temperature instability (BTI) and Process Variations (PV) compensation.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

Dynamically reconfigurable power efficient security for Internet of Things devices.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

Time-based read circuit for multi-bit memristor memories.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

A Single-Wavelength Photonic Network on Chip Design Based on Optical Orthogonal Codes.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Photodetected Power Maximization of Photonically Generated Impulse Radio Ultrawide Band Signals.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A study of Authentication Encryption Algorithms (POET, Deoxys, AEZ, MORUS, ACORN, AEGIS, AES-GCM) For Automotive Security.
Proceedings of the 30th International Conference on Microelectronics, 2018

Seizure Detection Using Gilbert's Algorithm.
Proceedings of the 30th International Conference on Microelectronics, 2018

A Low Power Hardware Implementation of Izhikevich Neuron using Stochastic Computing.
Proceedings of the 30th International Conference on Microelectronics, 2018

Real-Time Car Detection-Based Depth Estimation Using Mono Camera.
Proceedings of the 30th International Conference on Microelectronics, 2018

Multi-Bit RRAM Transient Modelling and Analysis.
Proceedings of the 30th International Conference on Microelectronics, 2018

Accelerating Deep Neural Networks Using FPGA.
Proceedings of the 30th International Conference on Microelectronics, 2018

Multiple Hybrid Compression Techniques for Electroencephalography Data.
Proceedings of the 30th International Conference on Microelectronics, 2018

Optimization of Handover Problem Using Q-learning for LTE Network.
Proceedings of the 30th International Conference on Microelectronics, 2018

Dynamic partial reconfiguration verification using assertion based verification.
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

Impact of dynamic partial reconfiguration on CONNECT Network-on-Chip for FPGAs.
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

On RF Telemetry for Implantable Medical Devices: A Communication Theory Perspective.
Proceedings of the 11th International Symposium on Communication Systems, 2018

2017
A Novel MIM-Capacitor-Based 1-GS/s 14-bit Variation-Tolerant Fully-Differential Voltage-to-Time Converter (VTC) Circuit.
J. Circuits Syst. Comput., 2017

Towards the implementation of Multi-band Multi-standard Software-Defined Radio using Dynamic Partial Reconfiguration.
Int. J. Commun. Syst., 2017

Accurate Closed-Form Expressions for the Bit Rate-Wireless Transmission Distance Relationship in IR-UWBoF Systems.
IEEE Commun. Lett., 2017

A Cost-Effective Dynamic Partial Reconfiguration Implementation Flow for Xilinx FPGA.
Proceedings of the New Generation of CAS, 2017

Exploiting the Dynamic Partial Reconfiguration on NoC-Based FPGA.
Proceedings of the New Generation of CAS, 2017

A Low-Power Self-Startup Bandgap Circuit for Energy Efficient Applications.
Proceedings of the New Generation of CAS, 2017

The Impact of Soft Errors on Memristor-Based Memory.
Proceedings of the New Generation of CAS, 2017

Characterization and model validation of triboelectric nanogenerators using Verilog-A.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A Codec, tiles to NoC router interface, for next generation FPGAs with embedded NoCs.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Area-efficient read/write circuit for spintronic memristor based memories.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A reconfigurable hardware platform implementation for software defined radio using dynamic partial reconfiguration on Xilinx Zynq FPGA.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A 1 GS/s 6-bit time-based analog-to-digital converter (T-ADC) for front-end receivers.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A VCO-Based MPPT Circuit for Low-Voltage Energy Harvesters.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

A Novel CMOS-Based Fully Differential Operational Floating Conveyor.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

3D-NOCET: A tool for implementing 3D-NoCs based on the Direct-Elevator algorithm.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Design guidelines for the high-speed dynamic partial reconfiguration based software defined radio implementations on Xilinx Zynq FPGA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A comparative analysis of optimized low-power comparators for biomedical-ADCs.
Proceedings of the 29th International Conference on Microelectronics, 2017

Low-power high-accuracy seizure detection algorithms for neural implantable platforms.
Proceedings of the 29th International Conference on Microelectronics, 2017

Design of a time-based capacitance-to-digital converter using current starved inverters.
Proceedings of the 29th International Conference on Microelectronics, 2017

V2V-based vehicle risk assessment and control for lane-keeping and collision avoidance.
Proceedings of the 29th International Conference on Microelectronics, 2017

An improved design for high speed analog applications of the fully differential operational floating conveyor.
Proceedings of the 29th International Conference on Microelectronics, 2017

Hybrid compression technique with data segmentation for electroencephalography data.
Proceedings of the 29th International Conference on Microelectronics, 2017

New low area NB-IoT turbo encoder interleaver by sharing resources.
Proceedings of the 29th International Conference on Microelectronics, 2017

2016
A Novel 10-Bit 2.8-mW TDC Design Using SAR With Continuous Disassembly Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

Statistical yield improvement under process variations of multi-valued memristor-based memories.
Microelectron. J., 2016

On the use of a programmable front-end for multi-band/multi-standard applications.
Microelectron. J., 2016

Electrical and optical clock and data recovery in optical access networks: a comparative study.
Int. J. Commun. Syst., 2016

An ultra-low power voltage-to-time converter (VTC) circuit for low power and low speed applications.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

A 200 MS/s 8-bit Time-based Analog-to-Digital Converter with inherit sample and hold.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

Novel ultra low voltage mobile compatible RF MEMS switch for reconfigurable microstrip antenna.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

Design guidelines for embeded NoCs on FPGAs.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Design guidelines for soft implementations to embedded NoCs of FPGAs.
Proceedings of the 11th International Design & Test Symposium, 2016

Leakage power evaluation of FinFET-based FPGA cluster under threshold voltage variation.
Proceedings of the 11th International Design & Test Symposium, 2016

Design and implementation of CDR and SerDes for high speed optical communication networks using FPGA.
Proceedings of the 18th International Conference on Transparent Optical Networks, 2016

A 16-bit high-speed low-power hybrid adder.
Proceedings of the 28th International Conference on Microelectronics, 2016

A voltage multiplying AC/DC converter for energy harvesting applications.
Proceedings of the 28th International Conference on Microelectronics, 2016

ASIC-oriented comparative review of hardware security algorithms for internet of things applications.
Proceedings of the 28th International Conference on Microelectronics, 2016

A low-power area-efficient design and comparative analysis for high-resolution neural data compression.
Proceedings of the 28th International Conference on Microelectronics, 2016

Performance analysis of hybrid lossy/lossless compression techniques for EEG data.
Proceedings of the 28th International Conference on Microelectronics, 2016

Read disturbance and temperature variation aware spintronic memristor model.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

2015
A Novel Nondestructive Read/Write Circuit for Memristor-Based Memory Arrays.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Micro-scale variation-tolerant exponential tracking energy harvesting system for wireless sensor networks.
Microelectron. J., 2015

Priority-select arbiter: An efficient round-robin arbiter.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

A new digital locking MPPT control for ultra low power energy harvesting systems.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

Performance evaluation of FinFET-based FPGA cluster under threshold voltage variation.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

Comparative review of NoCs in the context of ASICs and FPGAs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A new highly-linear highly-sensitive differential voltage-to-time converter circuit in CMOS 65nm technology.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A tunable multi-band/multi-standard receiver front-end supporting LTE.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A wide FBG-based Optical Clock and Data Recovery for optical access networks.
Proceedings of the 17th International Conference on Transparent Optical Networks, 2015

Comparison between analog and digital locking MPPT unit for micro-scale PV Energy Harvesting systems.
Proceedings of the 27th International Conference on Microelectronics, 2015

Dynamic channel coding reconfiguration in Software Defined Radio.
Proceedings of the 27th International Conference on Microelectronics, 2015

Insights for utilizing the memristor as a multi-bit based memory.
Proceedings of the 27th International Conference on Microelectronics, 2015

A new 65nm-CMOS 1V 8GS/s 9-bit differential Voltage-Controlled Delay Unit utilized for a Time-Based Analog-to-Digital Converter circuit.
Proceedings of the 27th International Conference on Microelectronics, 2015

A comparative analysis of optimized CMOS neural amplifier.
Proceedings of the 27th International Conference on Microelectronics, 2015

Comparison between active AC-DC converters for low power energy harvesting systems.
Proceedings of the 27th International Conference on Microelectronics, 2015

Direct-Elevator: A modified routing algorithm for 3D-NoCs.
Proceedings of the 27th International Conference on Microelectronics, 2015

A comparative evaluation of single-walled carbon nanotubes and copper in interconnects and Through-Silicon Vias.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

On the use of dynamic partial reconfiguration for multi-band/multi-standard software defined radio.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Low-power implantable seizure detection processor.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Performance evaluation of wavelength exchanging in optical interconnect.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Performance evaluation of dynamic partial reconfiguration techniques for software defined radio implementation on FPGA.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A new 16-bit low-power PVT-calibrated time-based differential Analog-to-Digital Converter (ADC) circuit in CMOS 65nm technology.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A CMOS based operational floating current conveyor and its applications.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Impact of technology scaling on the minimum energy point for FinFET based flip-flops.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Yield optimization of spintronic memristor-based memory arrays.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Review of NoC-based FPGAs architectures.
Proceedings of the 5th International Conference on Energy Aware Computing Systems & Applications, 2015

TDC SAR algorithm with continuous disassembly (SAR-CD) for time-based ADCs.
Proceedings of the 5th International Conference on Energy Aware Computing Systems & Applications, 2015

A new digital current sensing technique suitable for low power energy harvesting systems.
Proceedings of the 5th International Conference on Energy Aware Computing Systems & Applications, 2015

All-optical clock and data recovery using self-pulsating lasers for high-speed optical networks.
Proceedings of the 5th International Conference on Energy Aware Computing Systems & Applications, 2015

High performance layout-friendly 64-bit priority encoder utilizing parallel priority look-ahead.
Proceedings of the 5th International Conference on Energy Aware Computing Systems & Applications, 2015

A tunable receiver architecture utilizing time-varying matching network for a universal receiver.
Proceedings of the 5th International Conference on Energy Aware Computing Systems & Applications, 2015

The impact of FinFET technology scaling on critical path performance under process variations.
Proceedings of the 5th International Conference on Energy Aware Computing Systems & Applications, 2015

2014
A new design methodology for Voltage-to-Time Converters (VTCs) circuits suitable for Time-based Analog-to-Digital Converters (T-ADC).
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

A 4-bit 6GS/s time-based analog-to-digital converter.
Proceedings of the 26th International Conference on Microelectronics, 2014

A 500 MS/s 6 bits delay line ADC with inherit sample & hold.
Proceedings of the 26th International Conference on Microelectronics, 2014

Performance evaluation of finFET based SRAM under statistical VT variability.
Proceedings of the 26th International Conference on Microelectronics, 2014

A programmable receiver front-end architecture supporting LTE.
Proceedings of the 26th International Conference on Microelectronics, 2014

Yield maximization of TiO<sub>2</sub> memristor-based memory arrays.
Proceedings of the 26th International Conference on Microelectronics, 2014

A design oriented model for timing jitter/skew of Voltage-to-Time Converter (VTC) circuits.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

Circuit design techniques for increasing the output power of switched capacitor charge pumps.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

A novel non-destructive readout circuit for Memristor-based memory arrays.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

Comparative review of the TiO2 and the spintronic memristor devices.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

2013
Automatic Document Topic Identification Using Hierarchical Ontology Extracted from Human Background Knowledge.
PhD thesis, 2013

Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Highly-linear voltage-to-time converter (VTC) circuit for time-based analog-to-digital converters (T-ADCs).
Proceedings of the 20th IEEE International Conference on Electronics, 2013

Negative capacitance circuits for process variations compensation and timing yield improvement.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

Microscale Solar Energy Harvesting for Wireless Sensor Networks based on Exponential Maximum power locking technique.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012
On-Chip Process Variations Compensation Using an Analog Adaptive Body Bias (A-ABB).
IEEE Trans. Very Large Scale Integr. Syst., 2012

2011
A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Analytical Soft Error Models Accounting for Die-to-Die and Within-Die Variations in Sub-Threshold SRAM Cells.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2010
A Design-Oriented Soft Error Rate Variation Model Accounting for Both Die-to-Die and Within-Die Variations in Submicrometer CMOS SRAM Cells.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Novel FCS-Based Layout-Friendly Accurate Wide-Band Low-Power CCII- Realizations.
J. Circuits Syst. Comput., 2010

Statistical timing yield improvement of dynamic circuits using negative capacitance technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009


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