Hassan Daryanavard
Orcid: 0000-0002-6525-2562
According to our database1,
Hassan Daryanavard
authored at least 6 papers
between 2008 and 2024.
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Bibliography
2024
J. Real Time Image Process., April, 2024
J. Supercomput., March, 2024
2023
Scalable and custom-precision floating-point hardware convolution core for using in AI edge processors.
J. Real Time Image Process., October, 2023
Comput. Electr. Eng., September, 2023
A Low-Power Improved-Accuracy Approximate Error-Report-Propagate Adder for DSP Applications.
Circuits Syst. Signal Process., June, 2023
2008
On the Design of Architectural Pattern to Develop Dynamically Reconfigurable Autonomic Component.
Proceedings of the NCM 2008, The Fourth International Conference on Networked Computing and Advanced Information Management, Gyeongju, Korea, September 2-4, 2008, 2008