Hartwig Jeschke

According to our database, Hartwig Jeschke authored at least 9 papers between 1992 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

Guest Editorial: Special Issue on Embedded Computer Systems: Architectures, Modeling and Simulation.

John McAllister, David Guevorkian, Hartwig Jeschke, Mihai Sima

Int. J. Parallel Program., 2015

Energy- and latency-aware simulation of battery-operated wireless embedded networks for home automation.

Daniel Pfefferkorn, Hartwig Jeschke, Holger Blume

Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

2008

Efficiency measures for SOC concepts.

Hartwig Jeschke

J. Syst. Archit., 2008

2007

Chip size estimation for SOC design space exploration.

Hartwig Jeschke

J. Syst. Archit., 2007

Efficiency Measures for Multimedia SOCs.

Hartwig Jeschke

Proceedings of the Embedded Computer Systems: Architectures, 2007

2006

Design Space Expoloration Chip Size Estimation for SOC Design Space Exploration.

Hartwig Jeschke

Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

1998

A MIMD-based video signal processing architecture suitable for large area integration and a 16.6-cm² monolithic implementation.

Klaus Herrmann, Jan Otterstedt, Hartwig Jeschke, M. Kuboschek

IEEE Trans. Very Large Scale Integr. Syst., 1998

1993

A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications.

Klaus Gaedke, Hartwig Jeschke, Peter Pirsch

J. VLSI Signal Process., 1993

1992

Multiprocessor performance for real-time processing of video coding applications.

Hartwig Jeschke, Klaus Gaedke, Peter Pirsch

IEEE Trans. Circuits Syst. Video Technol., 1992