Harry R. Fair III

According to our database1, Harry R. Fair III authored at least 6 papers between 1995 and 2023.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023

2016
Carrizo: A High Performance, Energy Efficient 28 nm APU.
IEEE J. Solid State Circuits, 2016

2015
Steamroller Module and Adaptive Clocking System in 28 nm CMOS.
IEEE J. Solid State Circuits, 2015

4.8 A 28nm x86 APU optimized for power and area efficiency.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
5.5 Steamroller: An x86-64 core implemented in 28nm bulk CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

1995
Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU
Digit. Tech. J., 1995


  Loading...