Harry Foster
According to our database1,
Harry Foster
authored at least 27 papers
between 2001 and 2022.
Collaborative distances:
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Bibliography
2022
2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2018
Proceedings of the 19th International Workshop on Microprocessor and SOC Test and Verification, 2018
2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
2013
Proceedings of the 11th ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
2010
Increasing the Efficiency of Simulation-Based Functional Verification Through Unsupervised Support Vector Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Proceedings of the 47th Design Automation Conference, 2010
2009
Found. Trends Electron. Des. Autom., 2009
Pain, Possibilities, and Prescriptions Industry Trends in Advanced Functional Verification.
Proceedings of the Hardware and Software: Verification and Testing, 2009
2008
Proceedings of the 45th Design Automation Conference, 2008
Proceedings of the Computer Aided Verification, 20th International Conference, 2008
2007
Panel: Unified approach leading to a seamlessly evolving test bench for all phases of a multi-core design, validation and production test.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2007
2006
Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006
Proceedings of the 43rd Design Automation Conference, 2006
2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Proceedings of the 42nd Design Automation Conference, 2005
2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004
Assertion-based design, Second Edition.
Kluwer, ISBN: 978-1-4020-8027-2, 2004
2003
The Chip is Ready. Am I done? On-chip Verification using Assertion Processors.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Proceedings of the VLSI-SOC: From Systems to Chips, 2003
Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003
2002
Proceedings of the 39th Design Automation Conference, 2002
2001
IEEE Des. Test Comput., 2001
IEEE Des. Test Comput., 2001
Principles of verifiable RTL design - a functional coding style supporting verification processes in Verilog.
Kluwer, ISBN: 978-0-7923-7368-1, 2001