Harish V. Dixit

According to our database, Harish V. Dixit authored at least 2 papers between 2013 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2015

A novel VLSI design of DCTQ processor for FPGA implementation.

Yogesh M. Jain, Aviraj R. Jadhav, Harish V. Dixit, Akshay S. Hindole, Jithin R. Vadakoott, Devendra Bilaye

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2013

VLSI design of fast DCTQ-IQIDCT processor for real time image compression.

Harish V. Dixit, Amutha Jeyakumar, Piyush S. Kasat, Chirag Warty

Proceedings of the Tenth International Conference on Wireless and Optical Communications Networks, 2013