Harish M. Kittur

According to our database, Harish M. Kittur authored at least 16 papers between 2011 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

Content Addressable Memory - Early Predict and Terminate Precharge of Match-Line.

Mohammed Zackriya V, Harish M. Kittur

IEEE Trans. Very Large Scale Integr. Syst., 2017

2016

Precharge-Free, Low-Power Content-Addressable Memory.

V. Mohammed Zackriya, Harish M. Kittur

IEEE Trans. Very Large Scale Integr. Syst., 2016

Low Energy Metric Content Addressable Memory (CAM) with Multi Voltage Matchline Segments.

V. Mohammed Zackriya, Harish M. Kittur

J. Circuits Syst. Comput., 2016

2014

Low Power fractional-n frequency Divider with Improved Resolution.

V. Mohammed Zackriya, John Reuben, Ashim Harsh, Harish M. Kittur

J. Circuits Syst. Comput., 2014

Low power high throughput reconfigurable stream cipher hardware VLSI architectures.

R. Sakthivel, M. Vanitha, Harish M. Kittur

Int. J. Inf. Comput. Secur., 2014

Energy Efficient Low Area Error Tolerant Adder with Higher Accuracy.

R. Sakthivel, Harish M. Kittur

Circuits Syst. Signal Process., 2014

Selective Match-Line Energizer Content Addressable Memory(SMLE -CAM).

V. Mohammed Zackriya, Harish M. Kittur

CoRR, 2014

A novel clock generation algorithm for system-on-chip based on least common multiple.

John Reuben, Harish M. Kittur, Mohd Shoaib

Comput. Electr. Eng., 2014

2013

Faster and Energy-Efficient Signed Multipliers.

B. Ramkumar, Harish M. Kittur

VLSI Design, 2013

Design of dynamically reconfigurable fully optimized low power FFT architecture for MC-CDMA receiver.

R. Sakthivel, Harish M. Kittur

IEICE Electron. Express, 2013

Capacitance driven clock mesh synthesis to minimize skew and power dissipation.

John Reuben, V. Mohammed Zackriya, Salma Nashit, Harish M. Kittur

IEICE Electron. Express, 2013

2012

Low-Power and Area-Efficient Carry Select Adder.

B. Ramkumar, Harish M. Kittur

IEEE Trans. Very Large Scale Integr. Syst., 2012

Low power energy efficient pipelined multiply-accumulate architecture.

R. Sakthivel, K. Sravanthi, Harish M. Kittur

Proceedings of the 2012 International Conference on Advances in Computing, 2012

2011

Optimal Final Carry Propagate Adder Design for Parallel Multipliers

B. Ramkumar, Harish M. Kittur

CoRR, 2011

Faster and Low Power Twin Precision Multiplier

V. Sreedeep, B. Ramkumar, Harish M. Kittur

CoRR, 2011

Faster Energy Efficient Column Compression Multiplication

B. Ramkumar, Harish M. Kittur

CoRR, 2011