Harish Krishnamurthy

Orcid: 0000-0001-5927-8339

According to our database1, Harish Krishnamurthy authored at least 42 papers between 2008 and 2024.

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Bibliography

2024
A Monolithic 12.7 W/mm<sup>2</sup>, 92% Peak-Efficiency Switched-Capacitor DC-DC Converter Using CSCR-First Topology.
IEEE J. Solid State Circuits, December, 2024

A Monolithic 5.7A/mm<sup>2</sup> 91% Peak Efficiency Scalable Multi-Stage Modular Switched Capacitor Voltage Regulator with Self-Timed Deadtime and Safe Startup for 3D-ICs.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 5.4V-Vin, 9.3A/mm<sup>2</sup> 10MHz Buck IVR Chiplet in 55nm BCD Featuring Self-Timed Bootstrap and Same-Cycle ZVS Control.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

14.9 A Monolithic 10.5W/mm<sup>2</sup>600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

28.4 A Monolithic 12.7W/mm<sup>2</sup> Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC Converter.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
A 1.8W High-Frequency SIMO Converter Featuring Digital Sensor-Less Computational Zero-Current Operation and Non-Linear Duty-Boost.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Monolithic 26A/mm<sup>2</sup>Imax, 88.5% Peak-Efficiency Continuously Scalable Conversion-Ratio Switched-Capacitor DC-DC Converter.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
EM SCA White-Box Analysis-Based Reduced Leakage Cell Design and Presilicon Evaluation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors.
IEEE J. Solid State Circuits, 2022

Fully Integrated Voltage Regulators with Package-Embedded Inductors for Heterogeneous 3D-TSV-Stacked System-in-Package with 22nm CMOS Active Silicon Interposer Featuring Self-Trimmed, Digitally Controlled ON-Time Discontinuous Conduction Mode (DCM) Operation.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities.
IEEE Trans. Very Large Scale Integr. Syst., 2021

A Universal Modular Hybrid LDO With Fast Load Transient Response and Programmable PSRR in 14-nm CMOS Featuring Dynamic Clamp Strength Tuning.
IEEE J. Solid State Circuits, 2021

A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS.
IEEE J. Solid State Circuits, 2021

EM and Power SCA-Resilient AES-256 Through >350× Current-Domain Signature Attenuation and Local Lower Metal Routing.
IEEE J. Solid State Circuits, 2021

A 1S Direct-Battery-Attach Integrated Buck Voltage Regulator with 5-Stack Thin-Gate 22nm FinFET CMOS Featuring Active Voltage Balancing and Cascaded Self-Turn-ON Drivers.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

Session 17 Overview: DC-DC Converters Power Management Subcommittee.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response.
IEEE J. Solid State Circuits, 2020

A Dual-Rail Hybrid Analog/Digital LDO with Dynamic Current Steering for Tunable High PSRR and High Efficiency.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A SCA-Resistant AES Engine in 14nm CMOS with Time/Frequency-Domain Leakage Suppression using Non-Linear Digital LDO Cascaded with Arithmetic Countermeasures.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current Steering.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

27.3 EM and Power SCA-Resilient AES-256 in 65nm CMOS Through >350× Current-Domain Signature Attenuation.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Digital Control of Switching and Linear Integrated Voltage Regulators.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors.
IEEE J. Solid State Circuits, 2019

A Variation-Adaptive Integrated Computational Digital LDO in 22nm CMOS with Fast Transient Response.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode Operation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS.
IEEE J. Solid State Circuits, 2018

A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS.
IEEE J. Solid State Circuits, 2018

A Single-Stage, Single-Inductor, 6-Input 9-Output Multi-Modal Energy Harvesting Power Management IC for 100µW-120MW Battery-Powered IoT Edge Nodes.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2017
20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A digitally controlled linear regulator for per-core wide-range DVFS of atom™ cores in 14nm tri-gate CMOS featuring non-linear control, adaptive gain and code roaming.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

Digitally controlled voltage regulator using oscillator-based ADC with fast-transient-response and wide dropout range in 14nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2015
A 0.4V∼1V 0.2A/mm<sup>2</sup> 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS.
Proceedings of the Symposium on VLSI Circuits, 2014

Impact of process variation in inductive integrated voltage regulator on delay and power of digital circuits.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2012
Synthesizable delay line architectures for digitally controlled voltage regulators.
Proceedings of the IEEE 25th International SOC Conference, 2012

2010
Reduction of Torque Ripple in Induction Motor Drives Using an Advanced Hybrid PWM Technique.
IEEE Trans. Ind. Electron., 2010

2008
Space Vector Based Hybrid PWM Techniques for Reduced Current Ripple.
IEEE Trans. Ind. Electron., 2008


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