Haris Volos
Orcid: 0000-0002-3777-0012Affiliations:
- University of Cyprus, Nicosia, Cyprus
- Google, USA (former)
- Hewlett Packard Labs, Palo Alto, CA, USA (former)
- University of Wisconsin - Madison, Madison, WI, USA (former)
According to our database1,
Haris Volos
authored at least 25 papers
between 2007 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Agile C-states: A Core C-state Architecture for Latency Critical Applications Optimizing both Transition and Cold-Start Latency.
ACM Trans. Archit. Code Optim., December, 2024
Proceedings of the IEEE International Symposium on Workload Characterization, 2024
2022
AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
AgilePkgC: An Agile System Idle State Architecture for Energy Proportional Datacenter Servers.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
2021
Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over Hybrid Memories.
ACM Trans. Comput. Syst., 2021
MODC: Resilience for disaggregated memory architectures using task-based programming.
CoRR, 2021
IEEE Comput. Archit. Lett., 2021
2019
Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2019
2018
Proceedings of the ACM Symposium on Cloud Computing, 2018
2017
Proceedings of the 2017 Symposium on Cloud Computing, SoCC 2017, Santa Clara, CA, USA, 2017
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017
2016
Interconnect Emulator for Aiding Performance Analysis of Distributed Memory Applications.
Proceedings of the 7th ACM/SPEC International Conference on Performance Engineering, 2016
2015
A Framework for Emulating Non-Volatile Memory Systemswith Different Performance Characteristics.
Proceedings of the 6th ACM/SPEC International Conference on Performance Engineering, Austin, TX, USA, January 31, 2015
Proceedings of the 16th Annual Middleware Conference, Vancouver, BC, Canada, December 07, 2015
InterSense: Interconnect Performance Emulator for Future Scale-out Distributed Memory Applications.
Proceedings of the 23rd IEEE International Symposium on Modeling, 2015
2014
Proceedings of the Ninth Eurosys Conference 2014, 2014
2013
Proceedings of the Asia-Pacific Workshop on Systems, 2013
2012
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012
2011
Proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems, 2011
2009
Proceedings of the 2009 EuroSys Conference, Nuremberg, Germany, April 1-3, 2009, 2009
NePaLTM: Design and Implementation of Nested Parallelism for Transactional Memory Systems.
Proceedings of the ECOOP 2009, 2009
2008
2007
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007
Proceedings of the Programming Models for Ubiquitous Parallelism, 02.09. - 07.09.2007, 2007