Haris Lekatsas
According to our database1,
Haris Lekatsas
authored at least 36 papers
between 1998 and 2010.
Collaborative distances:
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Bibliography
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
ACM Trans. Embed. Comput. Syst., 2010
ACM Trans. Embed. Comput. Syst., 2010
2008
Design and Implementation of a High-Performance Microprocessor Cache Compression Algorithm.
Proceedings of the 2008 Data Compression Conference (DCC 2008), 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
Using Shiftable Content Addressable Memories to Double Memory Capacity on Embedded Systems.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
Proceedings of the 43rd Design Automation Conference, 2006
2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
A Unified Architecture for Adaptive Compression of Data and Code on Embedded Systems.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
2004
ACM Trans. Embed. Comput. Syst., 2004
Cypress: Compression and Encryption of Data and Code for Embedded Multimedia Systems.
IEEE Des. Test Comput., 2004
2003
IEEE Trans. Very Large Scale Integr. Syst., 2003
Proceedings of the 2003 Data Compression Conference (DCC 2003), 2003
Proceedings of the 2003 Design, 2003
CoCo: a hardware/software platform for rapid prototyping of code compression technologies.
Proceedings of the 40th Design Automation Conference, 2003
Multi-parametric improvements for embedded systems using code-placement and address bus coding.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the 2002 Design, 2002
Design of an one-cycle decompression hardware for performance increase in embedded systems.
Proceedings of the 39th Design Automation Conference, 2002
1-cycle code decompression circuitry for performance increase of Xtensa-1040-based embedded systems.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002
2001
Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001
Design and simulation of a pipelined decompression architecture for embedded systems.
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Proceedings of the Data Compression Conference, 2001
Proceedings of the 38th Design Automation Conference, 2001
2000
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000
Proceedings of the Data Compression Conference, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Proceedings of the Data Compression Conference, 1999
1998
Proceedings of the 35th Conference on Design Automation, 1998