Harini Ramaprasad
According to our database1,
Harini Ramaprasad
authored at least 31 papers
between 2005 and 2022.
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Bibliography
2022
Proceedings of the SIGCSE 2022: The 53rd ACM Technical Symposium on Computer Science Education, 2022
Criminal Investigations: An Interactive Experience to Improve Student Engagement and Achievement in Cybersecurity Courses.
Proceedings of the SIGCSE 2022: The 53rd ACM Technical Symposium on Computer Science Education, 2022
Design and Implementation of an Academic Integrity Module for Undergraduate CS Students.
Proceedings of the SIGCSE 2022: The 53rd ACM Technical Symposium on Computer Science Education, 2022
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022
2021
Criminal Investigations: An InteractiveExperience to Improve Student Engagement and Achievement in Cybersecurity courses.
Proceedings of the SIGCSE '21: The 52nd ACM Technical Symposium on Computer Science Education, 2021
2020
Using Forcing Functions to Improve Student Preparedness in an Operating Systems and Networking Class.
Proceedings of the 51st ACM Technical Symposium on Computer Science Education, 2020
Incorporating Embedded Systems Security Awareness into a Computer Science Course via Minimal Interventions.
Proceedings of the 51st ACM Technical Symposium on Computer Science Education, 2020
Application Constraints and Safety Aware Mapping of AUTOSAR Applications on Multi-core Platforms.
Proceedings of the 2020 IEEE International Conference on Embedded Software and Systems, 2020
Dynamic schedule management framework for aperiodic soft-real-time jobs on GPU based architectures.
Proceedings of the 2020 IEEE International Conference on Embedded Software and Systems, 2020
2018
Proceedings of the 49th ACM Technical Symposium on Computer Science Education, 2018
Proceedings of the 26th International Conference on Real-Time Networks and Systems, 2018
Hardware implementation of a multi-mode-aware mixed-criticality scheduler: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018
2017
Hypervisor-Induced Negative Interference in Virtualized Multi-core Platforms: The P4080 Case.
Proceedings of the 11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2017
2015
ACM Trans. Embed. Comput. Syst., 2015
Real Time Syst., 2015
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
2014
Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems, 2014
Adaptive Scheduling with Explicit Congestion Notification in a Cyber-Physical Smart Grid System.
Proceedings of the 40th EUROMICRO Conference on Software Engineering and Advanced Applications, 2014
Construction of GCCFG for inter-procedural optimizations in Software Managed Manycore (SMM) architectures.
Proceedings of the 2014 International Conference on Compilers, 2014
2013
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013
Proceedings of the ACM/IEEE 4th International Conference on Cyber-Physical Systems (with CPS Week 2013), 2013
2012
Semi-Partitioned Hard-Real-Time Scheduling under Locked Cache Migration in Multicore Systems.
Proceedings of the 24th Euromicro Conference on Real-Time Systems, 2012
Proceedings of the 15th International Conference on Compilers, 2012
2011
Proceedings of the ACM SIGPLAN/SIGBED 2011 conference on Languages, 2011
2010
2009
Proceedings of the 15th IEEE Real-Time and Embedded Technology and Applications Symposium, 2009
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, 2009
2008
Proceedings of the 14th IEEE Real-Time and Embedded Technology and Applications Symposium, 2008
2006
Proceedings of the 27th IEEE Real-Time Systems Symposium (RTSS 2006), 2006
Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2006), 2006
2005
Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns.
Proceedings of the 11th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2005), 2005