Harideep Nair

According to our database, Harideep Nair authored at least 20 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering.

Prabhu Vellaisamy, Harideep Nair, Vamsikrishna Ratnakaram, Dhruv Gupta, John Paul Shen

IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

Corrigendum: SemNet: Learning semantic attributes for human activity recognition with deep belief networks.

Shanmuga Venkatachalam, Harideep Nair, Ming Zeng, Cathy Tan, Ole J. Mengshoel, John Paul Shen

Frontiers Big Data, 2024

Tempus Core: Area-Power Efficient Temporal-Unary Convolution Core for Low-Precision Edge DLAs.

Prabhu Vellaisamy, Harideep Nair, Thomas Kang, Yichen Ni, Haoyang Fan, Bin Qi, Jeff Chen, R. D. Shawn Blanton, John Paul Shen

CoRR, 2024

Realtime Person Identification via Gait Analysis.

Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen

CoRR, 2024

OzMAC: An Energy-Efficient Sparsity-Exploiting Multiply-Accumulate-Unit Design for DL Inference.

Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen

CoRR, 2024

Commercial Evaluation of Zero-Skipping MAC Design for Bit Sparsity Exploitation in DL Inference.

Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen

Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors.

Harideep Nair, William Leyman, Agastya Sampath, Quinn Jacobson, John Paul Shen

Proceedings of the Neuro Inspired Computational Elements Conference, 2024

Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators.

Prabhu Vellaisamy, Harideep Nair, Di Wu, R. D. Shawn Blanton, John Paul Shen

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Realtime Person Identification via Gait Analysis Using IMU Sensors on Edge Devices.

Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen

Proceedings of the International Conference on Neuromorphic Systems, 2024

TNN-CIM: An In-SRAM CMOS Implementation of TNN-Based Synaptic Arrays with STDP Learning.

Harideep Nair, David Barajas-Jasso, Quinn Jacobson, John Paul Shen

Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023

tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit.

Prabhu Vellaisamy, Harideep Nair, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI.

Harideep Nair, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, John Paul Shen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

SemNet: Learning semantic attributes for human activity recognition with deep belief networks.

Shanmuga Venkatachalam, Harideep Nair, Ming Zeng, Cathy Tan, Ole J. Mengshoel, John Paul Shen

Frontiers Big Data, 2022

TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs.

Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021

A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks.

Harideep Nair, John Paul Shen, James E. Smith

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

Unsupervised Clustering of Time Series Signals Using Neuromorphic Energy-Efficient Temporal Neural Networks.

Shreyas Chaudhari, Harideep Nair, José M. F. Moura, John Paul Shen

Proceedings of the IEEE International Conference on Acoustics, 2021

2020

Direct CMOS Implementation of Neuromorphic Temporal Neural Networks for Sensory Processing.

Harideep Nair, John Paul Shen, James E. Smith

CoRR, 2020

2019

Hardware Aware Neural Network Architectures using FbNet.

Sai Vineeth Kalluru Srinivas, Harideep Nair, Vinay Vidyasagar

CoRR, 2019

Freeflow Core: Enhancing Performance of In-Order Cores with Energy Efficiency.

Raj Kumar Choudhary, Newton Singh, Harideep Nair, Rishabh Rawat, Virendra Singh

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

AttriNet: learning mid-level features for human activity recognition with deep belief networks.

Harideep Nair, Cathy Tan, Ming Zeng, Ole J. Mengshoel, John Paul Shen

Proceedings of the 2019 ACM International Joint Conference on Pervasive and Ubiquitous Computing and Proceedings of the 2019 ACM International Symposium on Wearable Computers, 2019