Hari Teja Reddy

According to our database1, Hari Teja Reddy authored at least 1 paper in 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2018
An Inverter-Based Analog Front End for a 56 GB/S PAM4 Wireline Transceiver in 16NMCMOS.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018


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