Hari Mony

According to our database¹, Hari Mony authored at least 23 papers between 2004 and 2016.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

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PhD thesis

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On csauthors.net:

Bibliography

2016

The art of semi-formal bug hunting.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2014

Scalable reachability analysis via automated dynamic netlist-based hint generation.

[BibT_eX]

[DOI]

Formal Methods Syst. Des., 2014

Effective Liveness Verification Using a Transformation-Based Framework.

[BibT_eX]

[DOI]

Proceedings of the 2014 27th International Conference on VLSI Design, 2014

2013

GLA: gate-level abstraction revisited.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Enhanced reachability analysis via automated dynamic netlist-based hint generation.

[BibT_eX]

[DOI]

Proceedings of the Formal Methods in Computer-Aided Design, 2012

IC3-guided abstraction.

[BibT_eX]

[DOI]

Proceedings of the Formal Methods in Computer-Aided Design, 2012

2011

Hybrid verification of a hardware modular reduction engine.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Formal Methods in Computer-Aided Design, 2011

Approximate reachability with combined symbolic and ternary simulation.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Formal Methods in Computer-Aided Design, 2011

Optimal redundancy removal without fixedpoint computation.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Formal Methods in Computer-Aided Design, 2011

2010

Coping with Moore's Law (and more): Supporting arrays in state-of-the-art model checkers.

[BibT_eX]

[DOI]

Jason Baumgartner

Michael L. Case

Hari Mony

Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, 2010

2009

Enhanced verification by temporal decomposition.

[BibT_eX]

[DOI]

Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, 2009

Scalable conditional equivalence checking: An automated invariant-generation based approach.

[BibT_eX]

[DOI]

Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, 2009

Speculative reduction-based scalable redundancy identification.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

Scalable liveness checking via property-preserving transformations.

[BibT_eX]

[DOI]

Jason Baumgartner

Hari Mony

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Invariant-Strengthened Elimination of Dependent State Elements.

[BibT_eX]

[DOI]

Proceedings of the Formal Methods in Computer-Aided Design, 2008

Optimal Constraint-Preserving Netlist Simplification.

[BibT_eX]

[DOI]

Jason Baumgartner

Hari Mony

Adnan Aziz

Proceedings of the Formal Methods in Computer-Aided Design, 2008

2007

Formal Verification of Partial Good Self-Test Fencing Structures.

[BibT_eX]

[DOI]

Adrian E. Seigler

Gary A. Van Huben

Hari Mony

Proceedings of the Formal Methods in Computer-Aided Design, 7th International Conference, 2007

2006

Scalable Sequential Equivalence Checking across Arbitrary Design Transformations .

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning.

[BibT_eX]

[DOI]

Barinjato Ramanandray

Hari Mony

Paul Roessler

Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006

2005

Exploiting suspected redundancy without proving it.

[BibT_eX]

[DOI]

Proceedings of the 42nd Design Automation Conference, 2005

Exploiting Constraints in Transformation-Based Verification.

[BibT_eX]

[DOI]

Hari Mony

Jason Baumgartner

Adnan Aziz

Proceedings of the Correct Hardware Design and Verification Methods, 2005

Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization and Localization Strategies.

[BibT_eX]

[DOI]

Jason Baumgartner

Hari Mony

Proceedings of the Correct Hardware Design and Verification Methods, 2005

2004

Scalable Automated Verification via Expert-System Guided Transformations.

[BibT_eX]

[DOI]

Proceedings of the Formal Methods in Computer-Aided Design, 5th International Conference, 2004

Hari Mony

Timeline

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