Hari Mohan Gaur

According to our database, Hari Mohan Gaur authored at least 8 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

Comprehensive and Comparative Analysis of QCA-based Circuit Designs for Next-generation Computation.

Vaibhav Jain, Devendra Kumar Sharma, Hari Mohan Gaur, Ashutosh Kumar Singh, Xiaoqing Wen

ACM Comput. Surv., May, 2024

2022

An Efficient Design of Scalable Reversible Multiplier with Testability.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

J. Circuits Syst. Comput., 2022

2021

Design of Single-Bit Fault-Tolerant Reversible Circuits.

Hari Mohan Gaur, Ashutosh Kumar Singh, Anand Mohan, Masahiro Fujita, Dhiraj K. Pradhan

IEEE Des. Test, 2021

Testable Designs of Toffoli Fredkin Reversible Circuits.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

CoRR, 2021

2019

Fault detection in multiple controlled Fredkin circuits.

Ashutosh Kumar Singh, Hari Mohan Gaur, Umesh Ghanekar

IET Circuits Devices Syst., 2019

Design of Reversible Arithmetic Logic Unit with Built-In Testability.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

IEEE Des. Test, 2019

2018

Offline Testing of Reversible Logic Circuits: An Analysis.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

Integr., 2018

Testable Design of Reversible Circuits Using Parity Preserving Gates.

Hari Mohan Gaur, Ashutosh Kumar Singh, Umesh Ghanekar

IEEE Des. Test, 2018