Hari Angepat

According to our database1, Hari Angepat authored at least 14 papers between 2007 and 2018.

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Bibliography

2018
Serving DNNs in Real Time at Datacenter Scale with Project Brainwave.
IEEE Micro, 2018


2017
Configurable Clouds.
IEEE Micro, 2017

HGum: Messaging framework for hardware accelerators.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

2016
A cloud-scale acceleration architecture.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

HGum: Messaging Framework for Hardware Accelerators (Abstact Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016


2014
FPGA-Accelerated Simulation of Computer Systems
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01744-5, 2014

An FPGA-based In-Line Accelerator for Memcached.
IEEE Comput. Archit. Lett., 2014

2010
NIFD: Non-intrusive FPGA Debugger -- Debugging FPGA 'Threads' for Rapid HW/SW Systems Prototyping.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
Embedded Java benchmark analysis on the ARM processor.
Int. J. Embed. Syst., 2009

Accurate Functional-First Multicore Simulators.
IEEE Comput. Archit. Lett., 2009

2008
Parallelizing computer system simulators.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

2007
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007


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