Harald Bucher
According to our database1,
Harald Bucher
authored at least 14 papers
between 2012 and 2019.
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Bibliography
2019
Worst-Case Execution-Time-Aware Parallelization of Model-Based Avionics Applications.
J. Aerosp. Inf. Syst., November, 2019
Cross-Layer Behavioral Modeling and Simulation of E/E-Architectures using PREEvision and Ptolemy II.
Simul. Notes Eur., 2019
2018
A WCET-aware parallel programming model for predictability enhanced multi-core architectures.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2015
Adaptive algorithm and tool flow for accelerating SystemC on many-core architectures.
Microprocess. Microsystems, 2015
A V2X message evaluation methodology and cross-domain modelling of safety applications in V2X-enabled E/E-architectures.
Proceedings of the 8th International Conference on Simulation Tools and Techniques, 2015
Power-Aware Design of Electronic System Level using Interoperation of Hybrid and Distributed Simulations.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
Power Estimation of an ECDSA Core Applied in V2X Scenarios Using Heterogeneous Distributed Simulation.
Proceedings of the 19th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2015
Proceedings of the 19th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2015
2014
Adaptive Algorithm and Tool Flow for Accelerating System C on Many-Core Architectures.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
A Platform-Based Modeling Approach Supporting C2X System Design.
Proceedings of the 8th Joint Workshop of the German Research Training Groups in Computer Science, 2014
2013
A SystemC modeling and simulation methodology for fast and accurate parallel MPSoC simulation.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013
Improving parallel MPSoC simulation performance by exploiting dynamic routing delay prediction.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013
2012
Proceedings of the 2012 International Symposium on System on Chip, 2012