Haozhe Zhu

According to our database, Haozhe Zhu authored at least 25 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros.

Mengjie Li, Haozhe Zhu, Siqi He, Hongyi Zhang, Jie Liao, Danfeng Zhai, Chixiao Chen, Qi Liu, Xiaoyang Zeng, Ninghui Sun, Ming Liu

IEEE J. Solid State Circuits, November, 2024

FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer.

Bo Jiao, Lei Xu, Xinyu Yu, Haitao Yang, Haozhe Zhu, Yu Wang, Jundong Zhu, Dexin Wen, Lingli Wang, Jun Tao, Chixiao Chen, Yinhe Han, Qi Liu, Ninghui Sun, Ming Liu

IEEE Trans. Circuits Syst. I Regul. Pap., September, 2024

Trident-CIM: A LUT-Based Compute-in-Memory Macro With Trident Read Bit-Line and Partial Product Pruning.

Haozhe Zhu, Hongyi Zhang, Siqi He, Mengjie Li, Xiaoyang Zeng, Chixiao Chen

IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

FAM-Former: Global Transformer and Feature Aggregation Module for Knee MRI Age Estimation.

Linchao He, Haozhe Zhu, Xiaodong Deng, Fei Fan, Peixi Liao, Wenchao Du, Hu Chen, Zhenhua Deng, Yi Zhang

IEEE Trans. Instrum. Meas., 2024

GauSPU: 3D Gaussian Splatting Processor for Real-Time SLAM Systems.

Lizhou Wu, Haozhe Zhu, Siqi He, Jiapei Zheng, Chixiao Chen, Xiaoyang Zeng

Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024

A 19.7 TFLOPS/W Multiply-less Logarithmic Floating-Point CIM Architecture with Error-Reduced Compensated Approximate Adder.

Mengjie Li, Hongyi Zhang, Siqi He, Haozhe Zhu, Hao Zhang, Jinglei Liu, Jiayuan Chen, Zhenping Hu, Xiaoyang Zeng, Chixiao Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

ARCTIC: Agile and Robust Compute-In-Memory Compiler with Parameterized INT/FP Precision and Built-In Self Test.

Hongyi Zhang, Haozhe Zhu, Siqi He, Mengjie Li, Chengchen Wang, Xiankui Xiong, Haidong Tian, Xiaoyang Zeng, Chixiao Chen

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine.

Shiwei Liu, Peizhe Li, Jinshan Zhang, Yunzhengmao Wang, Haozhe Zhu, Wenning Jiang, Shan Tang, Chixiao Chen, Qi Liu, Ming Liu

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration.

Jie Liao, Bo Jiao, Jinshan Zhang, Shiwei Liu, Hao Jiang, Jun Tao, Wenning Jiang, Qi Liu, Lihua Zhang, Haozhe Zhu, Chixiao Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros.

Hao Jiang, Jiapei Zheng, Yunzhengmao Wang, Jinshan Zhang, Haozhe Zhu, Liangjian Lyu, Yingping Chen, Chixiao Chen, Qi Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Bit-Offsetter: A Bit-serial DNN Accelerator with Weight-offset MAC for Bit-wise Sparsity Exploitation.

Siqi He, Hongyi Zhang, Mengjie Li, Haozhe Zhu, Chixiao Chen, Qi Liu, Xiaoyang Zeng

Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022

A 28 nm 81 Kb 59-95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output.

Keji Zhou, Xinru Jia, Chenyang Zhao, Xumeng Zhang, Guangjian Wu, Chen Mu, Haozhe Zhu, Yanting Ding, Chixiao Chen, Xiaoyong Xue, Xiaoyang Zeng, Qi Liu

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Road Defect Detection Based on Semantic Transformed Disparity Image Segmentation.

Li Wang, Wenbo Shi, Haozhe Zhu, Denghuang Zhang, Yikang Zhang, Jiahe Fan, Mohammud Junaid Bocus

Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2022

COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning.

Haozhe Zhu, Bo Jiao, Jinshan Zhang, Xinru Jia, Yunzhengmao Wang, Tianchan Guan, Shengcheng Wang, Dimin Niu, Hongzhong Zheng, Chixiao Chen, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Qi Liu, Yuan Xie, Ming Liu

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization.

Xinru Jia, Haozhe Zhu, Yunzheng Wang, Jinshan Zhang, Feng Lin, Xiankui Xiong, Dong Xu, Chixiao Chen, Qi Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

ALPINE: An Agile Processing-in-Memory Macro Compilation Framework.

Jinshan Zhang, Bo Jiao, Yunzhengmao Wang, Haozhe Zhu, Lihua Zhang, Chixiao Chen

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

Computing Utilization Enhancement for Chiplet-based Homogeneous Processing-in-Memory Deep Learning Processors.

Bo Jiao, Haozhe Zhu, Jinshan Zhang, Shunli Wang, Xiaoyang Kang, Lihua Zhang, Mingyu Wang, Chixiao Chen

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

A 0.57-GOPS/DSP Object Detection PIM Accelerator on FPGA.

Bo Jiao, Jinshan Zhang, Yuanyuan Xie, Shunli Wang, Haozhe Zhu, Xiaoyang Kang, Zhiyan Dong, Lihua Zhang, Chixiao Chen

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

An Efficient Markov Random Field Based Denoising Approach for Dynamic Vision Sensor.

Xi Cheng, Haozhe Zhu, Jingjing Liu, Mingyu Wang, Xiaoyang Zeng

Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020

A Communication-Aware DNN Accelerator on ImageNet Using In-Memory Entry-Counting Based Algorithm-Circuit-Architecture Co-Design in 65-nm CMOS.

Haozhe Zhu, Chixiao Chen, Shiwei Liu, Qiaosha Zou, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Chuanjin Richard Shi

IEEE J. Emerg. Sel. Topics Circuits Syst., 2020

Tanji: a General-purpose Neural Network Accelerator with Unified Crossbar Architecture.

Haozhe Zhu, Yu Wang, Chuanjin Richard Shi

IEEE Des. Test, 2020

XNORAM: An Efficient Computing-in-Memory Architecture for Binary Convolutional Neural Networks with Flexible Dataflow Mapping.

Shiwei Liu, Haozhe Zhu, Chixiao Chen, Lihua Zhang, Chuanjin Richard Shi

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2019

TRPN: Matrix Factorization Meets Recurrent Neural Network for Temporal Rating Prediction.

Haozhe Zhu, Yanyan Shen, Xian Zhou

Proceedings of the Web and Big Data - Third International Joint Conference, 2019

2018

OCEAN: An On-Chip Incremental-Learning Enhanced Artificial Neural Network Processor With Multiple Gated-Recurrent-Unit Accelerators.

Chixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu, Yu Wang, Chuanjin Richard Shi

IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

2017

OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators.

Chixiao Chen, Hongwei Ding, Huwan Peng, Haozhe Zhu, Rui Ma, Peiyong Zhang, Xiaolang Yan, Yu Wang, Mingyu Wang, Hao Min, Chuanjin Richard Shi

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017