Haoyi Zhang

Orcid: 0009-0004-2763-545X

According to our database1, Haoyi Zhang authored at least 19 papers between 2018 and 2024.

Collaborative distances:

Timeline

2018
2019
2020
2021
2022
2023
2024
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Links

On csauthors.net:

Bibliography

2024
Sleep Stage Classification Via Multi-View Based Self-Supervised Contrastive Learning of EEG.
IEEE J. Biomed. Health Informatics, December, 2024

A 266F<sup>2</sup> Ultra Stable Differential NOR-Structured Physically Unclonable Function With < 6x10<sup>-9</sup> Bit Error Rate Through Efficient Redundancy Strategy.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2024

A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM.
IEEE J. Solid State Circuits, March, 2024

AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models.
CoRR, 2024

LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Design.
CoRR, 2024

DELRec: Distilling Sequential Pattern to Enhance LLM-based Recommendation.
CoRR, 2024

The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.
CoRR, 2024

Post-layout simulation driven analog circuit sizing.
Sci. China Inf. Sci., 2024

Multi-strategy active learning for power quality disturbance identification.
Appl. Soft Comput., 2024

EGGesture: Entropy-Guided Vector Quantized Variational AutoEncoder for Co-Speech Gesture Generation.
Proceedings of the 32nd ACM International Conference on Multimedia, MM 2024, Melbourne, VIC, Australia, 28 October 2024, 2024

SAGERoute 2.0: Hierarchical Analog and Mixed Signal Routing Considering Versatile Routing Scenarios.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Exploration.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Interactive Analog Layout Editing With Instant Placement and Routing Legalization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2023

SAGERoute: Synergistic Analog Routing Considering Geometric and Electrical Constraints with Manual Design Compatibility.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

A Calibration-Free 15-level/Cell eDRAM Computing-in-Memory Macro with 3T1C Current-Programmed Dynamic-Cascoded MLC achieving 233-to-304-TOPS/W 4b MAC.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2019
Feature Selection Based on Twin Support Vector Regression.
Proceedings of the IEEE Symposium Series on Computational Intelligence, 2019

Least Squares Twin Support Vector Machine Based on Manifold-based Within-class Scatter.
Proceedings of the IEEE Symposium Series on Computational Intelligence, 2019

2018
Multi-Task Autoencoder for Noise-Robust Speech Recognition.
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

A Class of Fuzzy Smooth Piecewise Twin Support Vector Machine.
Proceedings of the 14th International Conference on Computational Intelligence and Security, 2018


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