Haoran Pu

According to our database, Haoran Pu authored at least 11 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

An Isolated Frequency Compensation Technique for Ultra-Low-Power Low-Noise Two-Stage OTAs.

Ahmad Reza Danesh, Mahyar Safiallah, Haoran Pu, Payam Heydari

IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

Transferable speech-to-text large language model alignment module.

Boyong Wu, Chao Yan, Haoran Pu

CoRR, 2024

2023

A Current-Adjusting Auto-Zeroing Technique for DC-Offset and Flicker-Noise Cancellation.

Mahyar Safiallah, Ahmad Reza Danesh, Haoran Pu, Payam Heydari

IEEE Trans. Very Large Scale Integr. Syst., December, 2023

Toward Future Brain-Computer Interface: Concurrent Neural Signal Acquisition and Brain Stimulation in CMOS

Haoran Pu

PhD thesis, 2023

A CMOS BD-BCI Incorporating Stimulation with Dual-Mode Charge Balancing and Time-Domain Pipelined Recording.

Haoran Pu, Ahmad Reza Danesh, Mahyar Safiallah, Jeffrey Lim, An H. Do, Zoran Nenadic, Payam Heydari

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022

A CMOS Dual-Mode Brain-Computer Interface Chipset With 2-mV Precision Time-Based Charge Balancing and Stimulation-Side Artifact Suppression.

Haoran Pu, Omid Malekzadeh-Arasteh, Ahmad Reza Danesh, Zoran Nenadic, An H. Do, Payam Heydari

IEEE J. Solid State Circuits, 2022

2021

A Fully-Integrated 1µW/Channel Dual-Mode Neural Data Acquisition System for Implantable Brain-Machine Interfaces.

Omid Malekzadeh-Arasteh, Haoran Pu, Ahmad Reza Danesh, Jeffrey Lim, Po T. Wang, Charles Yu Liu, An H. Do, Zoran Nenadic, Payam Heydari

Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021

A 40V Voltage-Compliance 12.75mA Maximum-Current Multipolar Neural Stimulator Using Time-Based Charge Balancing Technique Achieving 2mV Precision.

Haoran Pu, Ahmad Reza Danesh, Omid Malekzadeh-Arasteh, Won Joon Sohn, An H. Do, Zoran Nenadic, Payam Heydari

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020

An Energy-Efficient CMOS Dual-Mode Array Architecture for High-Density ECoG-Based Brain-Machine Interfaces.

Omid Malekzadeh-Arasteh, Haoran Pu, Jeffrey Lim, Charles Yu Liu, An H. Do, Zoran Nenadic, Payam Heydari

IEEE Trans. Biomed. Circuits Syst., 2020

2019

Study and Design of a Fast Start-Up Crystal Oscillator Using Precise Dithered Injection and Active Inductance.

Alireza Karimi-Bidhendi, Haoran Pu, Payam Heydari

IEEE J. Solid State Circuits, 2019

Dipole Cancellation as an Artifact Suppression Technique in Simultaneous Electrocorticography Stimulation and Recording.

Jeffrey Lim, Po T. Wang, Haoran Pu, Charles Yu Liu, Spencer S. Kellis, Richard A. Andersen, Payam Heydari, An H. Do, Zoran Nenadic

Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019