Hao Zhang
Affiliations:- Chinese Academy of Sciences, Institute of Computing Technology, State Key Laboratory of Computer Architecture, Beijing, China
According to our database1,
Hao Zhang
authored at least 37 papers
between 1997 and 2022.
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Bibliography
2022
Accelerating Data Transfer in Dataflow Architectures Through a Look-Ahead Acknowledgment Mechanism.
J. Comput. Sci. Technol., 2022
2021
Inf. Sci., 2021
2020
Future Gener. Comput. Syst., 2020
2019
PIM-WEAVER: A High Energy-efficient, General-purpose Acceleration Architecture for String Operations in Big Data Processing.
Sustain. Comput. Informatics Syst., 2019
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019
C-MAP: Improving the Effectiveness of Mapping Method for CGRA by Reducing NoC Congestion.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019
2018
A collective motion model based on two-layer relationship mechanism for bi-direction pedestrian flow simulation.
Simul. Model. Pract. Theory, 2018
Simul. Model. Pract. Theory, 2018
Crowd evacuation simulation approach based on navigation knowledge and two-layer control mechanism.
Inf. Sci., 2018
WEAVER: An Energy Efficient, General-Purpose Acceleration Architecture for String Operations in Big Data Applications.
Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2018
Proceedings of the 20th IEEE International Conference on High Performance Computing and Communications; 16th IEEE International Conference on Smart City; 4th IEEE International Conference on Data Science and Systems, 2018
SmarCo: An Efficient Many-Core Processor for High-Throughput Applications in Datacenters.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
2015
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
Thread ID based power reduction mechanism for multi-thread shared set-associative caches.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
2014
Microprocess. Microsystems, 2014
2013
Scalability study of molecular dynamics simulation on Godson-T many-core architecture.
J. Parallel Distributed Comput., 2013
SimICT: A fast and flexible framework for performance and power evaluation of large-scale architecture.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Low Execution Efficiency: When General Multi-core Processor Meets Wireless Communication Protocol.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013
Proceedings of the Advanced Parallel Processing Technologies, 2013
2012
IEEE Micro, 2012
Optimizing Sparse Matrix Vector Multiplication Using Cache Blocking Method on Fermi GPU.
Proceedings of the 13th ACIS International Conference on Software Engineering, 2012
ALWP: A Workload Partition Method for the Efficient Parallel Simulation of Manycores.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
2011
Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011
Performance analysis and optimization of molecular dynamics simulation on <i>Godson-T</i> many-core processor.
Proceedings of the 8th Conference on Computing Frontiers, 2011
Proceedings of the Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011
Proceedings of the Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011
2010
Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010
2009
J. Comput. Sci. Technol., 2009
2007
Proceedings of the 15th Euromicro International Conference on Parallel, 2007
Proceedings of the International Conference on Networking, 2007
Circuit implementation of floating point range reduction for trigonometric functions.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the Architecture of Computing Systems, 2007
2002
Proceedings of The Eleventh Text REtrieval Conference, 2002
1997