Hao-Yung Lo

According to our database, Hao-Yung Lo authored at least 11 papers between 1985 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2003

Built-in Test with Modified-Booth High-Speed Pipelined Multipliers and Dividers.

Hao-Yung Lo, Hsiu-Feng Lin, Chichyang Chen, Jenshiuh Liu, Chia-Cheng Liu

J. Electron. Test., 2003

1997

A Uniform and Squared Direct Two's Complement Multiplier.

Hao-Yung Lo

J. Inf. Sci. Eng., 1997

A Parallel CORDIC Algorithm for Sine and Cosine Generation.

Hao-Yung Lo

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1997

1996

Logarithmic Conversion by Four Partitioned Hybrid-ROMs.

Hao-Yung Lo, Hsiu-Feng Lin, Yue-Yuan Ho

Proceedings of the 1996 International Symposium on Parallel Architectures, 1996

1995

A New Method of Implementation of VLSI CORDIC for Sine and Cosine Computation.

Hao-Yung Lo, Hsiu-Feng Lin, Kuen-Shiuh Yang

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

Hybrid ROM Strategy (H-ROM) for Conversion Between Binary Numbers and Logarithms.

Hao-Yung Lo, Hsiu-Feng Lin, Chiang-Shiang Wan

J. Inf. Sci. Eng., 1994

An Optimal Matched and Parallel Mixed-Radix Converter.

Hao-Yung Lo

J. Inf. Sci. Eng., 1994

1990

An Algorithm for Scaling and Single Residue Error Correction in Residue Number Systems.

Chien-Chun Su, Hao-Yung Lo

IEEE Trans. Computers, 1990

High-speed signed digital multipiers for VLSI.

Hao-Yung Lo

Microprocessing and Microprogramming, 1990

1987

A Hardwired Generalized Algorithm for Generating the Logarithm Base-<i>k</i> by Iteration.

Hao-Yung Lo, Jau-Ling Chen

IEEE Trans. Computers, 1987

1985

Generation of a Precise Binary Logarithm with Difference Grouping Programmable Logic Array.

Hao-Yung Lo, Yoshinao Aoki

IEEE Trans. Computers, 1985