Hao-Wen Hsu

According to our database, Hao-Wen Hsu authored at least 5 papers between 2013 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

32-Gb/s NRZ and 40-Gb/s PAM-4 Transimpedance Amplifier Paralleling with a Differentiator for Bandwidth Enhancement in 90-nm CMOS Technology.

Jau-Ji Jou, Tien-Tsorng Shih, Hao-Wen Hsu

Circuits Syst. Signal Process., 2022

2021

A 5nm 5.7GHz@1.0V and 1.3GHz@0.5V 4kb Standard-Cell- Based Two-Port Register File with a 16T Bitcell with No Half-Selection Issue.

Hidehiro Fujiwara, Yi-Hsin Nien, Chih-Yu Lin, Hsien-Yu Pan, Hao-Wen Hsu, Shin-Rung Wu, Yao-Yi Liu, Yen-Huei Chen, Hung-Jen Liao, Jonathan Chang

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A 40-Gb/s NRZ Inductorless Transimpedance Amplifier in a 0.18-μm SiGe BiCMOS Technology.

Hao-Wen Hsu, Xuan-Yi Ye, Jau-Ji Jou, Tien-Tsorng Shih

Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2021

2019

25 Gb/s NRZ and 50 Gb/s PAM-4 Transimpedance Amplifier with Active Feedback and Equalization in 90 nm CMOS Technology.

Hao-Wen Hsu, Chih-Chen Peng, Jau-Ji Jou, Tien-Tsorng Shih, Yaw-Dung Wu, Shao-I Chu, Chih-Yuan Lien, Bing-Hong Liu

Proceedings of the 16th International Joint Conference on e-Business and Telecommunications, 2019

2013

Testing retention flip-flops in power-gated designs.

Hao-Wen Hsu, Shih-Hua Kuo, Wen-Hsiang Chang, Shi-Hao Chen, Ming-Tung Chang, Mango Chia-Tso Chao

Proceedings of the 31st IEEE VLSI Test Symposium, 2013