Hao Li
Orcid: 0000-0001-5471-4840Affiliations:
- Intel Corporation, Hillsboro, OR, USA
- Oregon State University, Department of Electrical Engineering and Computer Science, Corvallis, OR, USA (PhD 2016)
According to our database1,
Hao Li
authored at least 26 papers
between 2013 and 2022.
Collaborative distances:
Collaborative distances:
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Bibliography
2022
Silicon Photonic Microring-Based 4 × 112 Gb/s WDM Transmitter With Photocurrent-Based Thermal Control in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022
A Scalable 32-56 Gb/s 0.56-1.28 pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022
A 100-Gb/s PAM-4 Optical Receiver With 2-Tap FFE and 2-Tap Direct-Feedback DFE in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022
A 128 Gb/s, 11.2 mW Single-Ended PAM4 Linear TIA With 2.7 μA<sub>rms</sub> Input Noise in 22 nm FinFET CMOS.
IEEE J. Solid State Circuits, 2022
A 106 Gb/s 2.5 Vppd Linear Microring Modulator Driver with Integrated Photocurrent Sensor in 28nm CMOS.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022
2021
A 3-D-Integrated Silicon Photonic Microring-Based 112-Gb/s PAM-4 Transmitter With Nonlinear Equalization and Thermal Control.
IEEE J. Solid State Circuits, 2021
Silicon Photonic Micro-Ring Modulator-based 4 x 112 Gb/s O-band WDM Transmitter with Ring Photocurrent-based Thermal Control in 28nm CMOS.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
11.6 A 100Gb/s-8.3dBm-Sensitivity PAM-4 Optical Receiver with Integrated TIA, FFE and Direct-Feedback DFE in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the European Conference on Optical Communication, 2021
A Scalable 32-to-56Gb/s 0.56-to-1.28pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
12.1 A 3D-Integrated Microring-Based 112Gb/s PAM-4 Silicon-Photonic Transmitter with Integrated Nonlinear Equalization and Thermal Control.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
A 112 Gb/s PAM4 Transmitter with Silicon Photonics Microring Modulator and CMOS Driver.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019
2018
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
2016
A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 2016
A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization.
IEEE J. Solid State Circuits, 2016
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016
2015
A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS.
IEEE J. Solid State Circuits, 2015
25Gb/s hybrid-integrated silicon photonic receiver with microring wavelength stabilization.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015
A 25Gb/s, 520mW, 6.4Vpp Silicon-Photonic Mach-Zehnder Modulator with distributed driver in CMOS.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015
Energy efficiency comparisons of NRZ and PAM4 modulation for ring-resonator-based silicon photonic links.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
An 8-16 Gb/s, 0.65-1.05 pJ/b, Voltage-Mode Transmitter With Analog Impedance Modulation Equalization and Sub-3 ns Power-State Transitioning.
IEEE J. Solid State Circuits, 2014
A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2014
26.5 An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-tap impedance-modulated voltage-mode transmitter with fast power-state transitioning in 65nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
A 1.2 pJ/b 6.4 Gb/s 8+1-lane forwarded-clock receiver with PVT-variation-tolerant all-digital clock and data recovery in 28nm CMOS.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013