Hao-Chieh Chang

According to our database1, Hao-Chieh Chang authored at least 15 papers between 1998 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
A novel cross-layer mesh router placement scheme for wireless mesh networks.
EURASIP J. Wirel. Commun. Netw., 2011

2003
Hardware-Efficient Architecture Design for Zerotree Coding in MPEG-4 Still Texture Coder.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2002
VLSI architecture design of MPEG-4 shape coding.
IEEE Trans. Circuits Syst. Video Technol., 2002

2001
Efficient architecture of binary motion estimation for MPEG-4 shape coding.
Proceedings of the Visual Communications and Image Processing 2001, 2001

Scalable module-based architecture for MPEG-4 BMA motion estimation.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Error-Propagation Analysis and Concealment Strategy for MPEG-4 Video Bitstream with Data Partitioning.
Proceedings of the 2001 IEEE International Conference on Multimedia and Expo, 2001

Design and implementation of JPEG encoder IP core.
Proceedings of ASP-DAC 2001, 2001

2000
A Low Power 8 x 8 Direct 2-D DCT Chip Design.
J. VLSI Signal Process., 2000

MPEG-4 video bitstream structure analysis and its parsing architecture design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Performance analysis and architecture evaluation of MPEG-4 video codec system.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Low power full-search block-matching motion estimation chip for H.263+.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A novel image compression algorithm by using Log-Exp transform.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

A VLSI architecture design of VLC encoder for high data rate video/image coding.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998
A Low Power 2-D DCT Chip Design Using Direct 2-D Algorithm.
Proceedings of the ASP-DAC '98, 1998


  Loading...