Hans Mertens
According to our database1,
Hans Mertens
authored at least 17 papers
between 2015 and 2024.
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Bibliography
2024
Cost-Aware Query Policies in Active Learning for Efficient Autonomous Robotic Exploration.
CoRR, 2024
Monolithic Complementary Field Effect Transistors (CFET) Demonstrated using Middle Dielectric Isolation and Stacked Contacts.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Vt Fine-Tuning in Multi-Vt Gate-All-Around Nanosheet nFETs Using Rare-Earth Oxide-Based Dipole-First Gate Stack Compatible with CFET Integration.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Comparative Analysis of Uncertainty Quantification Models in Active Learning for Efficient System Identification of Dynamical Systems.
Proceedings of the 20th IEEE International Conference on Automation Science and Engineering, 2024
2023
Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Investigating Nanowire, Nanosheet and Forksheet FET Hot-Carrier Reliability via TCAD Simulations: Invited Paper.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Proceedings of the IEEE International Reliability Physics Symposium, 2023
2022
Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets.
Proceedings of the IEEE International Reliability Physics Symposium, 2022
2021
The properties, effect and extraction of localized defect profiles from degraded FET characteristics.
Proceedings of the IEEE International Reliability Physics Symposium, 2021
2019
Full (V<sub>g</sub>, V<sub>d</sub>) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Impact of Device Architecture and Gate Stack Processing on the Low-Frequency Noise of Silicon Nanowire Transistors.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
Proceedings of the 47th European Solid-State Device Research Conference, 2017
2015
NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Proceedings of the 2015 International Conference on IC Design & Technology, 2015