Hans Brekelmans
According to our database1,
Hans Brekelmans
authored at least 9 papers
between 2005 and 2022.
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Bibliography
2022
A 28-nm 6-GHz 2-bit Continuous-Time ΔΣ ADC With -101-dBc THD and 120-MHz Bandwidth Using Blind Digital DAC Error Correction.
IEEE J. Solid State Circuits, 2022
A 28nm 6GHz 2b Continuous-Time ΔΣ ADC with -101 dBc THD and 120MHz Bandwidth Using Digital DAC Error Correction.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2016
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2008
2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
2005
Analyses and design of bias circuits tolerating output voltages above BV<sub>CEO</sub>.
IEEE J. Solid State Circuits, 2005
Antenna and input stages of a 470-710 MHz silicon TV tuner for portable applications.
Proceedings of the 31st European Solid-State Circuits Conference, 2005