Hanif Fatemi

According to our database, Hanif Fatemi authored at least 17 papers between 2003 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

A Method of Via Variation Induced Delay Computation.

Moonsu Kim, Yun Heo, Seungjae Jung, Kelvin Le, Nathaniel Conos, Hanif Fatemi, Jongpil Lee, Youngmin Shin

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2013

Crosstalk timing windows overlap in statistical static timing analysis.

Hanif Fatemi, Peivand Tehrani

Proceedings of the International Symposium on Quality Electronic Design, 2013

2011

Accurate Timing and Noise Analysis of Combinational and Sequential Logic Cells Using Current Source Modeling.

Shahin Nazarian, Hanif Fatemi, Massoud Pedram

IEEE Trans. Very Large Scale Integr. Syst., 2011

2010

Statistical Path Selection for At-Speed Test.

Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chandu Visweswariah

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

2008

A Current Source Model for CMOS Logic Cells Considering Multiple Input Switching and Stack Effect.

Behnam Amelifard, Safar Hatami, Hanif Fatemi, Massoud Pedram

Proceedings of the Design, Automation and Test in Europe, 2008

2007

Parameterized Non-Gaussian Variational Gate Timing Analysis.

Soroush Abbaspour, Hanif Fatemi, Massoud Pedram

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Power optimal MTCMOS repeater insertion for global buses.

Hanif Fatemi, Behnam Amelifard, Massoud Pedram

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

A Current-based Method for Short Circuit Power Calculation under Noisy Input Waveforms.

Hanif Fatemi, Shahin Nazarian, Massoud Pedram

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

SACI: statistical static timing analysis of coupled interconnects.

Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, Amir H. Ajami, Emre Tuncer

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Non-gaussian statistical interconnect timing analysis.

Soroush Abbaspour, Hanif Fatemi, Massoud Pedram

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Statistical logic cell delay analysis using a current-based model.

Hanif Fatemi, Shahin Nazarian, Massoud Pedram

Proceedings of the 43rd Design Automation Conference, 2006

Parameterized block-based non-gaussian statistical gate timing analysis.

Soroush Abbaspour, Hanif Fatemi, Massoud Pedram

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Lifetime-aware intrusion detection under safeguarding constraints.

Ali Iranli, Hanif Fatemi, Massoud Pedram

Proceedings of the Fourth International Symposium on Information Processing in Sensor Networks, 2005

VGTA: Variation Aware Gate Timing Analysis.

Soroush Abbaspour, Hanif Fatemi, Massoud Pedram

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

VITA: variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input.

Soroush Abbaspour, Hanif Fatemi, Massoud Pedram

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

HEBS: Histogram Equalization for Backlight Scaling.

Ali Iranli, Hanif Fatemi, Massoud Pedram

Proceedings of the 2005 Design, 2005

2003

A Game Theoretic Approach to Dynamic Energy Minimization in Wireless Transceivers.

Ali Iranli, Hanif Fatemi, Massoud Pedram

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003