Hananeh Aliee

According to our database1, Hananeh Aliee authored at least 21 papers between 2011 and 2023.

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Bibliography

2023
Causal machine learning for single-cell genomics.
CoRR, 2023

Conditionally Invariant Representation Learning for Disentangling Cellular Heterogeneity.
CoRR, 2023

2022
Sparsity in Continuous-Depth Neural Networks.
Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022

2021
Beyond Predictions in Neural ODEs: Identification and Interventions.
CoRR, 2021


2019
Efficient Treatment of Uncertainty in System Reliability Analysis using Importance Measures.
Proceedings of the 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2019

2017
Reliability Analysis and Optimization of Embedded Systems using Stochastic Logic and Importance Measures.
PhD thesis, 2017

On the Boolean extension of the Birnbaum importance to non-coherent systems.
Reliab. Eng. Syst. Saf., 2017

Redundancy-aware Design Space Exploration for Memory Reliability in Many-cores.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017

System-level reliability analysis considering imperfect fault coverage.
Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, 2017

2016
A new time-independent reliability importance measure.
Eur. J. Oper. Res., 2016

Guiding Genetic Algorithms using importance measures for reliable design of embedded systems.
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016

2015
Application-aware cross-layer reliability analysis and optimization.
it Inf. Technol., 2015

2014
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience.
Microelectron. Reliab., 2014

Towards Cross-layer Reliability Analysis of Transient and Permanent Faults.
CoRR, 2014

An efficient technique for computing importance measures in automatic design of dependable embedded systems.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

2013
A Fast and Accurate Fault Tree Analysis Based on Stochastic Logic Implemented on Field-Programmable Gate Arrays.
IEEE Trans. Reliab., 2013

Automatic success tree-based reliability analysis for the consideration of transient and permanent faults.
Proceedings of the Design, Automation and Test in Europe, 2013

2011
A Fault-Tolerant, Dynamically Scheduled Pipeline Structure for Chip Multiprocessors.
Proceedings of the Computer Safety, Reliability, and Security, 2011

CPU-aware, process-level redundancy to tolerate faults in multi-core.
Proceedings of the 2011 International Conference on High Performance Computing & Simulation, 2011

An efficient, dynamically adaptive method to tolerate transient faults in multi-core systems.
Proceedings of the 13th European Workshop on Dependable Computing, 2011


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