Hanan A. Mahmoud

Affiliations:
  • King Saud University, Riyadh, Saudi Arabia


According to our database1, Hanan A. Mahmoud authored at least 21 papers between 1999 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2013
Efficient 45nm ASIC Architecture for Full-Search Free Intra Prediction in Real-Time H.264/AVC Decoder.
J. Signal Process. Syst., 2013

2012
Fast Motion Estimation System Using Dynamic Models for H.264/AVC Video Coding.
IEEE Trans. Circuits Syst. Video Technol., 2012

Hardware architecture for fast Intra mode and direction prediction in real-time MPEG-2 to H.264/AVC transcoder.
Proceedings of the 2012 IEEE International Symposium on a World of Wireless, 2012

2011
High speed intra mode and direction prediction for MPEG-2 to H.264/AVC realtime transcoder.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

2010
Novel technique for steganography in fingerprints images: Design and implementation.
Proceedings of the Sixth International Conference on Information Assurance and Security, 2010

Novel algorithmic countermeasures for Differential Power Analysis attacks on smart cards.
Proceedings of the Sixth International Conference on Information Assurance and Security, 2010

2009
A Multi Join Algorithm Utilizing Double Indices.
J. Convergence Inf. Technol., 2009

Noisy password security technique.
Proceedings of the 4th International Conference for Internet Technology and Secured Transactions, 2009

Noisy password scheme: A new one time password system.
Proceedings of the 22nd Canadian Conference on Electrical and Computer Engineering, 2009

2008
A Novel Efficient Classification Algorithm for Search Engines.
Proceedings of the 2008 International Conferences on Computational Intelligence for Modelling, 2008

2006
A New Efficient Block-Matching Algorithm for Motion Estimation.
J. VLSI Signal Process., 2006

2003
Memory accesses reduction for MIME algorithm.
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003

2002
A low power VLSI architecture for multistage interval-based motion estimation (MIME) algorithm.
Proceedings of the Third International Workshop on Digital and Computational Video, 2002

2001
Efficient low-bit-rate adaptive mesh-based motion compensation technique.
Proceedings of the Visual Information Processing X, Orlando, FL, USA, April 16, 2001, 2001

2000
Video codec incorporating block-based multihypothesis motion-compensated prediction.
Proceedings of the Visual Communications and Image Processing 2000, 2000

Low-bit-rate generalized quad-tree motion compensation algorithm and its optimal encoding schemes.
Proceedings of the Visual Communications and Image Processing 2000, 2000

A New Block-Matching Motion Estimation Algorithm Based on Successive Elimination.
Proceedings of the 2000 International Conference on Image Processing, 2000

An efficient low-bit rate adaptive mesh-based motion compensation technique.
Proceedings of the 2000 7th IEEE International Conference on Electronics, 2000

An Efficient Successive Elimination Algorithm for Block-Matching Motion Estimation.
Proceedings of the Data Compression Conference, 2000

An Efficient Low-Bit Rate Motion Compensation Technique Based on Quadtree.
Proceedings of the Data Compression Conference, 2000

1999
A 10-transistor low-power high-speed full adder cell.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999


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