Hana Kubátová

Proceedings of the 13th Mediterranean Conference on Embedded Computing, 2024

2022

Verification of Calculations of Non-Homogeneous Markov Chains Using Monte Carlo Simulation.

[BibT_eX]

[DOI]

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021

Secure and dependable: Area-efficient masked and fault-tolerant architectures.

[BibT_eX]

[DOI]

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2020

Non-homogeneous hierarchical Continuous Time Markov Chains.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2020

Refined Detection of SSH Brute-Force Attackers Using Machine Learning.

[BibT_eX]

[DOI]

Proceedings of the ICT Systems Security and Privacy Protection, 2020

Low Power Wireless Data Transfer for Internet of Things: GSM Network Measuring Results.

[BibT_eX]

[DOI]

Vojtech Procházka

Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020

Evaluating Bad Hosts Using Adaptive Blacklist Filter.

[BibT_eX]

[DOI]

Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020

Non-Homogeneous Continuous Time Markov Chains Calculations.

[BibT_eX]

[DOI]

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019

Efficient algorithmic evaluation of correlation power analysis: Key distinguisher based on the correlation trace derivative.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2019

Dependability Problems in Interconnected World.

[BibT_eX]

[DOI]

Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

Hierarchical Dependability Models based on Non-Homogeneous Continuous Time Markov Chains.

[BibT_eX]

[DOI]

Proceedings of the 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2019

Accurate Inexact Calculations of Non-Homogeneous Markov Chains.

[BibT_eX]

[DOI]

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

P4-To-VHDL: Automatic generation of high-speed input and output network blocks.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2018

Speeding up differential power analysis using integrated power traces.

[BibT_eX]

[DOI]

Proceedings of the 7th Mediterranean Conference on Embedded Computing, 2018

Correlation Power Analysis Distinguisher Based on the Correlation Trace Derivative.

[BibT_eX]

[DOI]

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017

Influence of passive hardware redundancy on differential power analysis resistance of AES cipher implemented in FPGA.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2017

The effect of the transient faults in dependability prediction.

[BibT_eX]

[DOI]

Filip Stepánek

Microprocess. Microsystems, 2017

Parity driven reconfigurable duplex system.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2017

Predicting the Life Expectancy of Railway Fail-Safe Signaling Systems Using Dynamic Models with Censoring.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Software Quality, 2017

Dependability or reliability in the real world history, terminology, prediction.

[BibT_eX]

[DOI]

Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

Influence of Fault-Tolerance Techniques on Power-Analysis Resistance of Cryptographic Design.

[BibT_eX]

[DOI]

Proceedings of the Euromicro Conference on Digital System Design, 2017

Dependability Prediction Involving Temporal Redundancy and the Effect of Transient Faults.

[BibT_eX]

[DOI]

Filip Stepánek

Proceedings of the Euromicro Conference on Digital System Design, 2017

Optimization of Pearson correlation coefficient calculation for DPA and comparison of different approaches.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016

Influence of fault-tolerant design methods on differential power analysis resistance of AES cipher: Methodics and challenges.

[BibT_eX]

[DOI]

Proceedings of the 5th Mediterranean Conference on Embedded Computing, 2016

Education of Computer Engineering at CTU in Prague.

[BibT_eX]

[DOI]

Proceedings of the 5th Mediterranean Conference on Embedded Computing, 2016

Hardware-software co-design: A practical course for future embedded engineers.

[BibT_eX]

[DOI]

Matej Bartík

Dominika Pichlová

Proceedings of the 5th Mediterranean Conference on Embedded Computing, 2016

P4-to-VHDL: Automatic Generation of 100 Gbps Packet Parsers.

[BibT_eX]

[DOI]

Pavel Benácek

Viktor Pus

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

Enhanced Duplication Method with TMR-Like Masking Abilities.

[BibT_eX]

[DOI]

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Comparing proton and neutron induced SEU cross section in FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

Parity Waterfall method.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

NEMEA: A framework for network traffic analysis.

[BibT_eX]

[DOI]

Proceedings of the 12th International Conference on Network and Service Management, 2016

2015

A System for Radiation Testing and Physical Fault Injection into the FPGAs and Other Electronics.

[BibT_eX]

[DOI]

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Using Application-Aware Flow Monitoring for SIP Fraud Detection.

[BibT_eX]

[DOI]

Proceedings of the Intelligent Mechanisms for Network Configuration and Security, 2015

2014

Fault Tolerant Duplex System with High Availability for Practical Applications.

[BibT_eX]

[DOI]

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Architecture of Effective High-Speed Network Stream Merger.

[BibT_eX]

[DOI]

Pavel Benácek

Viktor Pus

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Stream-wise detection of surreptitious traffic over DNS.

[BibT_eX]

[DOI]

Tomás Cejka

Zdenek Rosa

Proceedings of the 19th IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks, 2014

Change-point detection method on 100 Gb/s ethernet interface.

[BibT_eX]

[DOI]

Proceedings of the tenth ACM/IEEE symposium on Architectures for networking and communications systems, 2014

2013

Editorial of special issue: Digital System Safety and Security.

[BibT_eX]

[DOI]

Paris Kitsos

Microprocess. Microsystems, 2013

Markov chains hierarchical dependability models: Worst-case computations.

[BibT_eX]

[DOI]

Proceedings of the 14th Latin American Test Workshop, 2013

Predictive Analysis of Mission Critical Systems Dependability.

[BibT_eX]

[DOI]

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

System for Radiation Testing of FPGAs.

[BibT_eX]

[DOI]

Tomas Vanat

Proceedings of the ARCS 2013, 2013

Hierarchical Dependability Models Based on Markov Chains.

[BibT_eX]

[DOI]

Proceedings of the ARCS 2013, 2013

2012

Miscellaneous Types of Partial Duplication Modifications for Availability Improvements.

[BibT_eX]

[DOI]

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Reduction of complex safety models based on Markov chains.

[BibT_eX]

[DOI]

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011

Fault Models Usability Study for On-line Tested FPGA.

[BibT_eX]

[DOI]

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010

Faults Coverage Improvement Based on Fault Simulation and Partial Duplication.

[BibT_eX]

[DOI]

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009

Reliable Railway Station System Based on Regular Structure Implemented in FPGA.

[BibT_eX]

[DOI]

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008

Dependability and testing of modern digital systems.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2008

Column-matching based mixed-mode test pattern generator design technique for BIST.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2008

Dependable design technique for system-on-chip.

[BibT_eX]

[DOI]

J. Syst. Archit., 2008

Experimental SEU Impact on Digital Design Implemented in FPGAs.

[BibT_eX]

[DOI]

Jirí Kvasnicka

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Dependability Evaluation of Real Railway Interlocking Device.

[BibT_eX]

[DOI]

Jan Konarski

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System.

[BibT_eX]

[DOI]

Jirí Kvasnicka

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006

Conference Reports.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2006

Fault Tolerant System Design Method Based on Self-Checking Circuits.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

Dependable Design for FPGA Based on Duplex System and Reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Flexible Two-Level Boolean Minimizer BOOM-II and Its Applications.

[BibT_eX]

[DOI]

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Dependability Computation for Fault Tolerant Reconfigurable Duplex System.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Multiple-Vector Column-Matching BIST Design Method.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005

Dependability computations for fault-tolerant system based on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on Electronics, 2005

Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST.

[BibT_eX]

[DOI]

Peter Filter

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004

Survey of the Algorithms in the Column-Matching BIST Method.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004

Boolean Minimizer FC-Min: Coverage Finding Process.

[BibT_eX]

[DOI]

Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

FPGA Based Design of the Railway's Interlocking Equipments.

[BibT_eX]

[DOI]

Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2003

FC-Min: A Fast Multi-Output Boolean Minimizer.

[BibT_eX]

[DOI]

Jan Hlavicka

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2002

Digital testing and reliability education (DTRE) computer tool.

[BibT_eX]

[DOI]