Han-Yeol Lee

According to our database, Han-Yeol Lee authored at least 5 papers between 2012 and 2017.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of four.

2017

An On-Chip Monitoring Circuit for Signal-Integrity Analysis of 8-Gb/s Chip-to-Chip Interfaces With Source-Synchronous Clock.

Pil-Ho Lee, Han-Yeol Lee, Hyun Bae Lee, Young-Chan Jang

IEEE Trans. Very Large Scale Integr. Syst., 2017

A 10-Gbps receiver bridge chip with deserializer for FPGA-based frame grabber supporting MIPI CSI-2.

Pil-Ho Lee, Han-Yeol Lee, Yeong-Woong Kim, Han-Young Hong, Young-Chan Jang

IEEE Trans. Consumer Electron., 2017

2016

A 10-bit 20-MS/s Asynchronous SAR ADC with Meta-Stability Detector Using Replica Comparators.

Sang-Min Park, Yeon-Ho Jeong, Yu-Jeong Hwang, Pil-Ho Lee, Yeong-Woong Kim, Jisu Son, Han-Yeol Lee, Young-Chan Jang

IEICE Trans. Electron., 2016

An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis.

Pil-Ho Lee, Yu-Jeong Hwang, Han-Yeol Lee, Hyun Bae Lee, Young-Chan Jang

IEICE Trans. Electron., 2016

2012

A true single-phase clocked flip-flop with leakage current compensation.

Han-Yeol Lee, Young-Chan Jang

IEICE Electron. Express, 2012