Hamed Fatemi

According to our database, Hamed Fatemi authored at least 27 papers between 2005 and 2020.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2020

Heuristic Methods for Fine-Grain Exploitation of FDSOI.

Hamed Fatemi, Andrew B. Kahng, Hyein Lee, José Pineda de Gyvez

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Optimal bounded-skew steiner trees to minimize maximum <i>k</i>-active dynamic power.

Hamed Fatemi, Andrew B. Kahng, Minsoo Kim, José Pineda de Gyvez

Proceedings of the SLIP '20: System-Level Interconnect, 2020

2019

Timing Speculation With Optimal In Situ Monitoring Placement and Within-Cycle Error Prevention.

Hadi Ahmadi Balef, Hamed Fatemi, Kees Goossens, José Pineda de Gyvez

IEEE Trans. Very Large Scale Integr. Syst., 2019

Enhancing sensitivity-based power reduction for an industry IC design context.

Hamed Fatemi, Andrew B. Kahng, Hyein Lee, Jiajia Li, José Pineda de Gyvez

Integr., 2019

Energy and power awareness in hardware schedulers for energy harvesting IoT SoCs.

P. Anagnostou, Andres Gomez, Pascal A. Hager, Hamed Fatemi, José Pineda de Gyvez, Lothar Thiele, Luca Benini

Integr., 2019

Keyword Spotting using Time-Domain Features in a Temporal Convolutional Network.

Emad A. Ibrahim, Jos Huisken, Hamed Fatemi, José Pineda de Gyvez

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

CLIM: A Cross-Level Workload-Aware Timing Error Prediction Model for Functional Units.

Xun Jiao, Abbas Rahimi, Yu Jiang, Jianguo Wang, Hamed Fatemi, José Pineda de Gyvez, Rajesh K. Gupta

IEEE Trans. Computers, 2018

Torpor: A Power-Aware HW Scheduler for Energy Harvesting IoT SoCs.

P. Anagnostou, Andres Gomez, Pascal A. Hager, Hamed Fatemi, José Pineda de Gyvez, Lothar Thiele, Luca Benini

Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

Low power latch based design with smart retiming.

Kamlesh Singh, Hailong Jiao, Jos Huisken, Hamed Fatemi, José Pineda de Gyvez

Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

Effective In-Situ Chip Health Monitoring with Selective Monitor Insertion Along Timing Paths.

Hadi Ahmadi Balef, Hamed Fatemi, Kees Goossens, José Pineda de Gyvez

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2017

Logic Design Partitioning for Stacked Power Domains.

Kristof Blutman, Hamed Fatemi, Ajay Kapoor, Andrew B. Kahng, Jiajia Li, José Pineda de Gyvez

IEEE Trans. Very Large Scale Integr. Syst., 2017

Increasing the energy efficiency of microcontroller platforms with low-design margin co-processors.

Andres Gomez, Andrea Bartolini, Davide Rossi, Baris Can Kara, Hamed Fatemi, José Pineda de Gyvez, Luca Benini

Microprocess. Microsystems, 2017

A Low-Power Microcontroller in a 40-nm CMOS Using Charge Recycling.

Kristof Blutman, Ajay Kapoor, Arjun Majumdar, Jacinto Garcia Martinez, Juan Diego Echeverri, Leo Sevat, Arnoud P. van der Wel, Hamed Fatemi, Kofi A. A. Makinwa, José Pineda de Gyvez

IEEE J. Solid State Circuits, 2017

A scan-chain based state retention methodology for IoT processors operating on intermittent energy.

Pascal Alexander Hager, Hamed Fatemi, José Pineda de Gyvez, Luca Benini

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Floorplan and placement methodology for improved energy reduction in stacked power-domain design.

Kristof Blutman, Hamed Fatemi, Andrew B. Kahng, Ajay Kapoor, Jiajia Li, José Pineda de Gyvez

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

A microcontroller with 96% power-conversion efficiency using stacked voltage domains.

Kristof Blutman, Ajay Kapoor, Arjun Majumdar, Jacinto Garcia Martinez, Juan Diego Echeverri, Leo Sevat, Arnoud P. van der Wel, Hamed Fatemi, José Pineda de Gyvez, Kofi A. A. Makinwa

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Circuit valorization in the IC design ecosystem.

José Pineda de Gyvez, Hamed Fatemi, Maarten Vertregt

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Lower power by voltage stacking: a fine-grained system design approach.

Kristof Blutman, Ajay Kapoor, Jacinto Garcia Martinez, Hamed Fatemi, José Pineda de Gyvez

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Supervised learning based model for predicting variability-induced timing errors.

Xun Jiao, Abbas Rahimi, Balakrishnan Narayanaswamy, Hamed Fatemi, José Pineda de Gyvez, Rajesh K. Gupta

Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

Reducing energy consumption in microcontroller-based platforms with low design margin co-processors.

Andres Gomez, Christian Pinto, Andrea Bartolini, Davide Rossi, Luca Benini, Hamed Fatemi, José Pineda de Gyvez

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Digital Systems Power Management for High Performance Mixed Signal Platforms.

Ajay Kapoor, Cas Groot, Gerard Villar Pique, Hamed Fatemi, Juan Diego Echeverri, Leo Sevat, Maarten Vertregt, Maurice Meijer, Vibhu Sharma, Yu Pu, José Pineda de Gyvez

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2012

Sliding-Mode Control to Compensate PVT Variations in dual core systems.

Hamid Reza Pourshaghaghi, Hamed Fatemi, José Pineda de Gyvez

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2008

DC-SIMD : Dynamic communication for SIMD processors.

Raymond Frijns, Hamed Fatemi, Bart Mesman, Henk Corporaal

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

2006

RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications.

Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Basten, Richard P. Kleihorst

J. Embed. Comput., 2006

Run-time reconfiguration of communication in SIMD architectures.

Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Basten, Pieter P. Jonker

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Dynamic-SIMD for lens distortion compensation.

Bart Mesman, Hamed Fatemi, Henk Corporaal, Twan Basten

Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005

Designing Area and Performance Constrained SIMD/VLIW Image Processing Architectures.

Hamed Fatemi, Henk Corporaal, Twan Basten, Richard P. Kleihorst, Pieter P. Jonker

Proceedings of the Advanced Concepts for Intelligent Vision Systems, 2005