Hamed Farbeh
Orcid: 0000-0002-4204-9131
According to our database1,
Hamed Farbeh
authored at least 41 papers
between 2011 and 2024.
Collaborative distances:
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Bibliography
2024
IEEE Trans. Circuits Syst. II Express Briefs, August, 2024
An Energy Efficient Multi-Retention STT-MRAM Memory Architecture for IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024
Multi-Retention STT-MRAM Architectures for IoT: Evaluating the Impact of Retention Levels and Memory Mapping Schemes.
IEEE Access, 2024
2023
An adaptive data coding scheme for energy consumption reduction in SDN-based Internet of Things.
Comput. Networks, February, 2023
Microelectron. J., 2023
2022
Microprocess. Microsystems, April, 2022
LETHOR: a thermal-aware proactive routing algorithm for 3D NoCs with less entrance to hot regions.
J. Supercomput., 2022
J. Supercomput., 2022
3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison.
IEEE Trans. Computers, 2022
GraphA: An efficient ReRAM-based architecture to accelerate large scale graph processing.
J. Syst. Archit., 2022
A Novel Neuromorphic Processors Realization of Spiking Deep Reinforcement Learning for Portfolio Management.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
TAMER: an adaptive task allocation method for aging reduction in multi-core embedded real-time systems.
J. Supercomput., 2021
ECC-United Cache: Maximizing Efficiency of Error Detection/Correction Codes in Associative Cache Memories.
IEEE Trans. Computers, 2021
Microelectron. J., 2021
2020
A System-Level Framework for Analytical and Empirical Reliability Exploration of STT-MRAM Caches.
IEEE Trans. Reliab., 2020
2019
Sleepy-LRU: extending the lifetime of non-volatile caches by reducing activity of age bits.
J. Supercomput., 2019
AWARE: Adaptive Way Allocation for Reconfigurable ECCs to Protect Write Errors in STT-RAM Caches.
IEEE Trans. Emerg. Top. Comput., 2019
RAW-Tag: Replicating in Altered Cache Ways for Correcting Multiple-Bit Errors in Tag Array.
IEEE Trans. Dependable Secur. Comput., 2019
A-CACHE: Alternating Cache Allocation to Conduct Higher Endurance in NVM-Based Caches.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
IEEE Trans. Computers, 2019
Microelectron. J., 2019
High performance and predictable memory controller for multicore mixed-criticality real-time systems.
IET Comput. Digit. Tech., 2019
Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
ROBIN: incremental oblique interleaved ECC for reliability improvement in STT-MRAM caches.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 IEEE 16th Intl Conf on Dependable, 2018
2017
An Efficient Protection Technique for Last Level STT-RAM Caches in Multi-Core Processors.
IEEE Trans. Parallel Distributed Syst., 2017
Investigating the effects of process variations and system workloads on endurance of non-volatile caches.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017
WIPE: Wearout Informed Pattern Elimination to Improve the Endurance of NVM-based Caches.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Floating-ECC: Dynamic Repositioning of Error Correcting Code Bits for Extending the Lifetime of STT-RAM Caches.
IEEE Trans. Computers, 2016
Investigating the Effects of Process Variations and System Workloads on Reliability of STT-RAM Caches.
Proceedings of the 12th European Dependable Computing Conference, 2016
2015
In-Scratchpad Memory Replication: Protecting Scratchpad Memories in Multicore Embedded Systems against Soft Errors.
ACM Trans. Design Autom. Electr. Syst., 2015
Proceedings of the 11th European Dependable Computing Conference, 2015
2014
A data recomputation approach for reliability improvement of scratchpad memory in embedded systems.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
Proceedings of the 2013 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2013
2012
Memory Mapped SPM: Protecting Instruction Scratchpad Memory in Embedded Systems against Soft Errors.
Proceedings of the 2012 Ninth European Dependable Computing Conference, 2012
2011
Proceedings of the IEEE/IFIP 9th International Conference on Embedded and Ubiquitous Computing, 2011