Hamed Aminzadeh
Orcid: 0000-0001-7956-624X
According to our database1,
Hamed Aminzadeh
authored at least 34 papers
between 2006 and 2024.
Collaborative distances:
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Bibliography
2024
Current sharing and voltage restoration based on determination of transmission line resistance considering constant power loads in direct current microgrids.
Int. J. Circuit Theory Appl., July, 2024
Hybrid Cascode Compensation With Hybrid Q-Factor Control for Three-Stage Unconditionally Stable Amplifiers.
IEEE Access, 2024
2023
Hybrid Cascode Frequency Compensation for Four-Stage OTAs Driving a Wide Range of C<sub>L</sub>.
IEEE Trans. Very Large Scale Integr. Syst., November, 2023
Circuits Syst. Signal Process., March, 2023
2022
3.48-nW 58.4ppm/°C Sub-threshold CMOS Voltage Reference with Four Transistors and Two Resistors.
J. Circuits Syst. Comput., 2022
Picowatt 0.3-V MOS-only voltage reference based on a picoamp cascode current generator.
Integr., 2022
Subthreshold reference circuit with curvature compensation based on the channel length modulation of MOS devices.
Int. J. Circuit Theory Appl., 2022
IEEE Access, 2022
Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range.
IEEE Access, 2022
2020
0.7-V supply, 21-nW All-MOS voltage reference using a MOS-Only current-driven reference core in digital CMOS.
Microelectron. J., 2020
Global impedance attenuation network for multistage OTAs driving a broad range of load capacitor.
Int. J. Circuit Theory Appl., 2020
g <sub>m</sub>/<i>I</i> <sub>D</sub> functions of MOS devices" >Systematic circuit design and analysis using generalised <i>g</i> <sub>m</sub>/<i>I</i> <sub>D</sub> functions of MOS devices.
IET Circuits Devices Syst., 2020
2019
Dual loop cascode-Miller compensation with damping factor control unit for three-stage amplifiers driving ultralarge load capacitors.
Int. J. Circuit Theory Appl., 2019
A Low-Cost Tiny-Size Successive Approximation ADC for Applications Requiring Low-Resolution Conversion with Moderate Sampling Rate.
Circuits Syst. Signal Process., 2019
2017
Nano-Scale Silicon Quantum Dot-Based Single-Electron Transistors and Their Application to Design of Analog-to-Digital Convertors at Room Temperature.
J. Circuits Syst. Comput., 2017
2014
Low-Dropout Voltage Source: An Alternative Approach for Low-Dropout Voltage Regulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2014
Miller Compensation: Optimal Design for Operational Amplifiers with a Required Settling Time.
Circuits Syst. Signal Process., 2014
2013
Hybrid cascode feedforward compensation for nano-scale low-power ultra-area-efficient three-stage amplifiers.
Microelectron. J., 2013
Mosfet-only Two-Stage Operational amplifiers with Miller compensation: Design and fabrication in nano-Scale CMOS.
J. Circuits Syst. Comput., 2013
2011
Three-stage nested-Miller-compensated operational amplifiers: Analysis, design, and optimization based on settling time.
Int. J. Circuit Theory Appl., 2011
Low-dropout regulators: Hybrid-cascode compensation to improve stability in nano-scale CMOS technologies.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Low-dropout voltage reference: An approach to buffered architectures with low sensitivity.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2008
On the Power Efficiency of cascode Compensation over Miller Compensation in Two-Stage Operational amplifiers.
J. Circuits Syst. Comput., 2008
Design of high-speed two-stage cascode-compensated operational amplifiers based on settling time and open-loop parameters.
Integr., 2008
IEICE Electron. Express, 2008
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
On the power efficiency of cascode compensation over Miller compensation in two-stage operational amplifiers.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
2007
Design of Two-Stage Miller-Compensated Amplifiers Based on an Optimized Settling Model.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Systematic design of two-stage operational amplifiers based on settling time and open-loop constraints.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Folded-current-steering DAC: an approach to low-voltage high-speed high-resolution D/A converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006