Hakki Mert Torun
Orcid: 0000-0002-9611-1658
According to our database1,
Hakki Mert Torun
authored at least 13 papers
between 2017 and 2024.
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Bibliography
2024
A PPA Study for Heterogeneous 3-D IC Options: Monolithic, Hybrid Bonding, and Microbumping.
IEEE Trans. Very Large Scale Integr. Syst., March, 2024
2021
Machine Learning based Design and Optimization for High-Performance Semiconductor Packaging and Systems.
PhD thesis, 2021
Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
2019
IBM J. Res. Dev., 2019
Machine Learning and Uncertainty Quantification for Surrogate Models of Integrated Devices With a Large Number of Parameters.
IEEE Access, 2019
A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors.
Proceedings of the International Conference on Computer-Aided Design, 2019
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
A Global Bayesian Optimization Algorithm and Its Application to Integrated System Design.
IEEE Trans. Very Large Scale Integr. Syst., 2018
2017
Beyond the limits of classic backscattering communications: A quantum tunneling RFID tag.
Proceedings of the 2017 IEEE International Conference on RFID, 2017