Hakjune Oh
According to our database1,
Hakjune Oh
authored at least 2 papers
between 2005 and 2013.
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Bibliography
2013
800 MB/s DDR NAND Flash Memory Multi-Chip Package With Source-Synchronous Interface for Point-to-Point Ring Topology.
IEEE Access, 2013
2005
A 1GHz embedded DRAM macro and fully programmable BIST with at-speed bitmap capability.
Proceedings of the 13th IEEE International Workshop on Memory Technology, 2005