Hakim Bederr

According to our database1, Hakim Bederr authored at least 9 papers between 1994 and 1998.

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Bibliography

1998
Efficient Totally Self-Checking Shifter Design.
J. Electron. Test., 1998

1997
An Effective Multi-Chip BIST Scheme.
J. Electron. Test., 1997

Fault-secure shifter design: results and implementations.
Proceedings of the European Design and Test Conference, 1997

1996
Designing Self-Testable Multi-Chip Modules.
Proceedings of the 1996 European Design and Test Conference, 1996

1995
Testing complex couplings in multiport memories.
IEEE Trans. Very Large Scale Integr. Syst., 1995

A tool for automatic generation of self-checking data paths.
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Analytic approach for error masking elimination in on-line multipliers.
Proceedings of the 12th Symposium on Computer Arithmetic (ARITH-12 '95), 1995

1994
Design for testability of on-line multipliers.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Efficient Implementations of Self-Checking Multiply and Divide Arrays.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994


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