Hakduran Koc

According to our database1, Hakduran Koc authored at least 15 papers between 2003 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
An FPGA Based Multi-Sensor Atmospheric Testing Device for Confined Spaces.
Proceedings of the 12th IEEE Annual Ubiquitous Computing, 2021

2020
Data Compression and Re-computation Based Performance Improvement in Multi-Core Architectures.
Proceedings of the 10th Annual Computing and Communication Workshop and Conference, 2020

2019
Reliability Modeling and Analysis for Cyber Physical Systems.
Proceedings of the IEEE 9th Annual Computing and Communication Workshop and Conference, 2019

2018
An FPGA Synthesis of Face Detection Algorithm using HAAR Classifier.
Proceedings of the 2018 2nd International Conference on Algorithms, Computing and Systems, 2018

Optimizing energy consumption in cyber physical systems using multiple operating modes.
Proceedings of the IEEE 8th Annual Computing and Communication Workshop and Conference, 2018

2017
Input/output processing using on-chip memory for Cyber Physical System.
Proceedings of the IEEE 7th Annual Computing and Communication Workshop and Conference, 2017

MMC-based phase partitioning for data intensive applications.
Proceedings of the IEEE 7th Annual Computing and Communication Workshop and Conference, 2017

2014
AYSE: Automated System Synthesis Environment.
Int. J. Technol. Educ. Mark., 2014

2013
A low power electronic sticker for vehicle identification system using proprietary active RFID wireless protocol.
Proceedings of the International Conference on Connected Vehicles and Expo, 2013

2010
Exploiting large on-chip memory space through data recomputation.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

2007
Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors.
Proceedings of the 44th Design Automation Conference, 2007

2006
Reducing Memory Requirements through Task Recomputation in Embedded Multi-CPU Systems.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Minimizing energy consumption of banked memories using data recomputation.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

Using Task Recomputation During Application Mapping in Parallel Embedded Architectures.
Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

2003
Derving Intermediary RTLs for Verification of Pipelined Synthesized Designs.
Proceedings of the International Conference on VLSI, 2003


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