Hakan Çetinkaya
Orcid: 0000-0002-5328-943X
According to our database1,
Hakan Çetinkaya
authored at least 7 papers
between 2008 and 2024.
Collaborative distances:
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Bibliography
2024
Cogn. Process., November, 2024
2023
Fully integrated multi-level non-overlapping clock phase generator for pipelined ADCs in SiGe BiCMOS 0.13 μm.
Microelectron. J., September, 2023
A Low Noise TIA with T-network Feedback Using High Value Gate Controlled PMOS Resistors.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
2019
Composite Resistor Technique for Process and Temperature Compensations of Low Power Ring Oscillators.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
2018
A 1.6 GHz Non-overlap Clock Generation with Differential Clock Driver and Clock Level Shifters for GS/s Sampling Rate Pipeline ADCs.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
2017
A concurrent multiband fully differential CMOS LNA with a local active feedback for cellular applications 3G-4G.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
2008
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008