Haifeng Liu

Orcid: 0000-0003-3319-254X

Affiliations:
  • Huazhong University of Science and Technology, Clusters and Grid Computing Lab, National Engineering Research Center for Big Data Technology, Wuhan, China


According to our database1, Haifeng Liu authored at least 13 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2024
L-FNNG: Accelerating Large-Scale KNN Graph Construction on CPU-FPGA Heterogeneous Platform.
ACM Trans. Reconfigurable Technol. Syst., September, 2024

An Efficient GCNs Accelerator Using 3D-Stacked Processing-in-Memory Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2024

Minimal Context-Switching Data Race Detection with Dataflow Tracking.
J. Comput. Sci. Technol., March, 2024

Enabling Efficient Large Recommendation Model Training with Near CXL Memory Processing.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

Towards Redundancy-Free Recommendation Model Training via Reusable-aware Near-Memory Processing.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Accelerating Personalized Recommendation with Cross-level Near-Memory Processing.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

GraphMetaP: Efficient MetaPath Generation for Dynamic Heterogeneous Graph Models.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

AFaVS: Accurate Yet Fast Version Switching for Graph Processing Systems.
Proceedings of the 39th IEEE International Conference on Data Engineering, 2023

FNNG: A High-Performance FPGA-based Accelerator for K-Nearest Neighbor Graph Construction.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

MeG<sup>2</sup>: In-Memory Acceleration for Genome Graphs Analysis.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
A Flexible Yet Efficient DNN Pruning Approach for Crossbar-Based Processing-in-Memory Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

ReaDy: A ReRAM-Based Processing-in-Memory Accelerator for Dynamic Graph Convolutional Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A General Offloading Approach for Near-DRAM Processing-In-Memory Architectures.
Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022


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