Hai Huang

According to our database, Hai Huang authored at least 4 papers between 2017 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

A 78.5-dB SNDR Radiation- and Metastability-Tolerant Two-Step Split SAR ADC Operating Up to 75 MS/s With 24.9-mW Power Consumption in 65-nm CMOS.

Hongda Xu, Hai Huang, Yongda Cai, Ling Du, Yuan Zhou, Benwei Xu, Datao Gong, Jingbo Ye, Yun Chiu

IEEE J. Solid State Circuits, 2019

2017

A Non-Interleaved 12-b 330-MS/s Pipelined-SAR ADC With PVT-Stabilized Dynamic Amplifier Achieving Sub-1-dB SNDR Variation.

Hai Huang, Hongda Xu, Brian Elies, Yun Chiu

IEEE J. Solid State Circuits, 2017

A 1.2-GS/s 8-bit Two-Step SAR ADC in 65-nm CMOS With Passive Residue Transfer.

Hai Huang, Ling Du, Yun Chiu

IEEE J. Solid State Circuits, 2017

28.4 A 12b 330MS/s pipelined-SAR ADC with PVT-stabilized dynamic amplifier achieving <1dB SNDR variation.

Hai Huang, Sudipta Sarkar, Brian Elies, Yun Chiu

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017