Hae-Seung Lee

According to our database, Hae-Seung Lee authored at least 83 papers between 1988 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC With Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET.

Rishabh Mittal, Hajime Shibata, Sharvil Patil, Erik Krommenhoek, Prawal Shrestha, Gabriele Manganaro, Anantha P. Chandrakasan, Hae-Seung Lee

IEEE J. Solid State Circuits, April, 2024

Modeling Analog-Digital-Converter Energy and Area for Compute-In-Memory Accelerator Design.

Tanner Andrulis, Ruicong Chen, Hae-Seung Lee, Joel S. Emer, Vivienne Sze

CoRR, 2024

2023

Sniff-SAR: A 9.8fJ/c.-s 12b secure ADC with detectiondriven protection against power and EM side-channel attack.

Ruicong Chen, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

Machine Learning for Arterial Blood Pressure Prediction.

Jessica Zheng, Hanrui Wang, Anand Chandrasekhar, Aaron D. Aguirre, Song Han, Hae-Seung Lee, Charles G. Sodini

Proceedings of the Conference on Health, Inference, and Learning, 2023

2022

RaM-SAR: A Low Energy and Area Overhead, 11.3fJ/conv.-step 12b 25MS/s Secure Random-Mapping SAR ADC with Power and EM Side-channel Attack Resilience.

Ruicong Chen, Hanrui Wang, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Bit-level Sparsity-aware SAR ADC with Direct Hybrid Encoding for Signed Expressions for AIoT Applications.

Ruicong Chen, H. T. Kung, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

2021

Non-Invasive Evaluation of a Carotid Arterial Pressure Waveform Using Motion-Tolerant Ultrasound Measurements During the Valsalva Maneuver.

Joohyun Seo, Hae-Seung Lee, Charles G. Sodini

IEEE J. Biomed. Health Informatics, 2021

S2ADC: A 12-bit, 1.25-MS/s Secure SAR ADC With Power Side-Channel Attack Resistance.

Taehoon Jeong, Anantha P. Chandrakasan, Hae-Seung Lee

IEEE J. Solid State Circuits, 2021

2020

GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning.

Hanrui Wang, Kuan Wang, Jiacheng Yang, Linxiao Shen, Nan Sun, Hae-Seung Lee, Song Han

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance.

Taehoon Jeong, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019

An 8-bit 2.8 GS/s Flash ADC with Time-based Offset Calibration and Interpolation in 65 nm CMOS.

Xi Yang, Seung-Jun Bae, Hae-Seung Lee

Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018

Learning to Design Circuits.

Hanrui Wang, Jiacheng Yang, Hae-Seung Lee, Song Han

CoRR, 2018

Design of a 6^th-order Continuous-time Bandpass Delta-Sigma Modulator with 250 MHz IF, 25 MHz Bandwidth, and over 75 dB SNDR.

Xi Yang, Hae-Seung Lee

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles.

Harneet Singh Khurana, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Monitoring of Pulse Pressure and Arterial Pressure Waveform Changes during the Valsalva Maneuver by a Portable Ultrasound System.

Joohyun Seo, Charles G. Sodini, Hae-Seung Lee

Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

EMG-based Real Time Facial Gesture Recognition for Stress Monitoring.

Sirma Orguc, Harneet Singh Khurana, Konstantina M. Stankovic, Hae-Seung Lee, Anantha P. Chandrakasan

Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

2017

0.3 V ultra-low power sensor interface for EMG.

Sirma Orguc, Harneet Singh Khurana, Hae-Seung Lee, Anantha P. Chandrakasan

Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016

A Column-Row-Parallel ASIC Architecture for 3-D Portable Medical Ultrasonic Imaging.

Kailiang Chen, Hae-Seung Lee, Charles G. Sodini

IEEE J. Solid State Circuits, 2016

Design of a 4th-order multi-stage feedforward operational amplifier for continuous-time bandpass delta sigma modulators.

Xi Yang, Hae-Seung Lee

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A Sampling Clock Skew Correction Technique for Time-Interleaved SAR ADCs.

Daniel Prashanth, Hae-Seung Lee

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Data converter reflections: 19 papers from the last ten years that deserve a second look.

David Robertson, Aaron Buchwald, Michael Flynn, Hae-Seung Lee, Un-Ku Moon, Boris Murmann

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

2015

A Continuous-Time Sturdy-MASH ΔΣ Modulator in 28 nm CMOS.

Do-Yeon Yoon, Stacy Ho, Hae-Seung Lee

IEEE J. Solid State Circuits, 2015

A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers.

Hyun Ho Boo, Duane S. Boning, Hae-Seung Lee

IEEE J. Solid State Circuits, 2015

15.1 An 85dB-DR 74.6dB-SNDR 50MHZ-BW CT MASH ΔΣ modulator in 28nm CMOS.

Do-Yeon Yoon, Stacy Ho, Hae-Seung Lee

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Session 26 overview: Nyquist-rate converters: Data converters subcommittee.

Hae-Seung Lee, Seng-Pan Li

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

15.6 12b 250MS/S pipelined ADC with virtual ground reference buffers.

Hyun Ho Boo, Duane S. Boning, Hae-Seung Lee

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Carotid arterial blood pressure waveform monitoring using a portable ultrasound system.

Joohyun Seo, Sabino J. Pietrangelo, Hae-Seung Lee, Charles G. Sodini

Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

A 200-MS/s 98-dB SNR track-and-hold in 0.25-um GaN HEMT.

SungWon Chung, Hae-Seung Lee

Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014

A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.

Soon-Kyun Shin, Jacques Christophe Rudell, Denis C. Daly, Carlos E. Muñoz, Dong-Young Chang, Kush Gulati, Hae-Seung Lee, Matthew Z. Straayer

IEEE J. Solid State Circuits, 2014

A 1 GS/s 10b 18.9 mW Time-Interleaved SAR ADC With Background Timing Skew Calibration.

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

IEEE J. Solid State Circuits, 2014

A Column-Row-Parallel ASIC architecture for 3D wearable / portable medical ultrasonic imaging.

Kailiang Chen, Hae-Seung Lee, Charles G. Sodini

Proceedings of the Symposium on VLSI Circuits, 2014

22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration.

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

11.6 A 21mW 15b 48MS/s zero-crossing pipeline ADC in 0.13μm CMOS with 74dB SNDR.

Dong-Young Chang, Carlos E. Muñoz, Denis C. Daly, Soon-Kyun Shin, Kevin Guay, Thomas Thurston, Hae-Seung Lee, Kush Gulati, Matthew Z. Straayer

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013

Ultrasonic Imaging Transceiver Design for CMUT: A Three-Level 30-Vpp Pulse-Shaping Pulser With Improved Efficiency and a Noise-Optimized Receiver.

Kailiang Chen, Hae-Seung Lee, Anantha P. Chandrakasan, Charles G. Sodini

IEEE J. Solid State Circuits, 2013

Power-efficient amplifier frequency compensation for continuous-time delta-sigma modulators.

Do-Yeon Yoon, Hae-Seung Lee, Jeffrey Gealow

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 12b 50MS/s 2.1mW SAR ADC with redundancy and digital background calibration.

Albert H. Chang, Hae-Seung Lee, Duane S. Boning

Proceedings of the ESSCIRC 2013, 2013

2012

A 12 b 5-to-50 MS/s 0.5-to-1 V Voltage Scalable Zero-Crossing Based Pipelined ADC.

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

IEEE J. Solid State Circuits, 2012

A 2.9-mW 11-b 20-MS/s pipelined ADC with dual-mode-based digital background calibration.

Nan Sun, Hae-Seung Lee, Donhee Ham

Proceedings of the 38th European Solid-State Circuit conference, 2012

A 12b 200MS/s frequency scalable zero-crossing based pipelined ADC in 55nm CMOS.

Soon-Kyun Shin, Jacques Christophe Rudell, Denis C. Daly, Carlos E. Muñoz, Dong-Young Chang, Kush Gulati, Hae-Seung Lee, Matthew Z. Straayer

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011

Zero-Crossing Detector Based Reconfigurable Analog System.

Payam Lajevardi, Anantha P. Chandrakasan, Hae-Seung Lee

IEEE J. Solid State Circuits, 2011

Redundancy in SAR ADCs.

Albert H. Chang, Hae-Seung Lee, Duane S. Boning

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

A 12b 5-to-50MS/s 0.5-to-1V voltage scalable zero-crossing based pipelined ADC.

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the 37th European Solid-State Circuits Conference, 2011

A 450 MS/s 10-bit time-interleaved zero-crossing based ADC.

Jack Chu, Hae-Seung Lee

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010

Zero-Crossing-Based Ultra-Low-Power A/D Converters.

Hae-Seung Lee, Lane Brooks, Charles G. Sodini

Proc. IEEE, 2010

Offset cancellation for zero crossing based circuits.

Albert Chow, Hae-Seung Lee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Noise Analysis for Comparator-Based Circuits.

Todd Sepke, Peter Holloway, Charles G. Sodini, Hae-Seung Lee

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A 12b, 50 MS/s, Fully Differential Zero-Crossing Based Pipelined ADC.

Lane Brooks, Hae-Seung Lee

IEEE J. Solid State Circuits, 2009

A 12b 50MS/s fully differential zero-crossing-based ADC without CMFB.

Lane Brooks, Hae-Seung Lee

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008

Digital Background Calibration in Pipelined ADCs Using Commutated Feedback Capacitor Switching.

Nan Sun, Hae-Seung Lee, Donhee Ham

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Background Calibration of Pipelined ADCs Via Decision Boundary Gap Estimation.

Lane Brooks, Hae-Seung Lee

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Analog-to-Digital Converters: Digitizing the Analog World.

Hae-Seung Lee, Charles G. Sodini

Proc. IEEE, 2008

A 16b 10MS/s digitally self-calibrated ADC with time constant control.

Tae-Hwan Oh, Ho-Young Lee, Ju-Hwa Kim, Ho-Jin Park, Kyoung-Ho Moon, Jae-Whui Kim, Hae-Seung Lee

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

A 101-dB SNR hybrid delta-sigma audio ADC using post integration time control.

Moo-Yeol Choi, Sung-No Lee, Seung-Bin You, Wang-Seup Yeum, Ho-Jin Park, Jae-Whui Kim, Hae-Seung Lee

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

A Zero-Crossing-Based 8-bit 200 MS/s Pipelined ADC.

Lane Brooks, Hae-Seung Lee

IEEE J. Solid State Circuits, 2007

A Zero-Crossing-Based 8b 200MS/s Pipelined ADC.

Lane Brooks, Hae-Seung Lee

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Transient Noise Analysis for Comparator-Based Switched-Capacitor Circuits.

Albert Chow, Hae-Seung Lee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A 14-b 30MS/s 0.75mm² Pipelined ADC with On-Chip Digital Self-Calibration.

Ho-Young Lee, Tae-Hwan Oh, Ho-Jin Park, Hae-Seung Lee, Mark Spaeth, Jae-Whui Kim

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies.

John Kenneth Fiorenza, Todd Sepke, Peter Holloway, Charles G. Sodini, Hae-Seung Lee

IEEE J. Solid State Circuits, 2006

A 3MPixel Low-Noise Flexible Architecture CMOS Image Sensor.

Jungwook Yang, Keith Fife, Lane Brooks, Charles G. Sodini, Andrew Betts, Pavan Mudunuru, Hae-Seung Lee

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

CMOS-based microdisplay with calibrated backplane.

Andrew R. Chen, Akintunde Ibitayo (Tayo) Akinwande, Hae-Seung Lee

IEEE J. Solid State Circuits, 2005

2004

Study of substrate noise and techniques for minimization.

Mark Shane Peng, Hae-Seung Lee

IEEE J. Solid State Circuits, 2004

Radio frequency digital-to-analog converter.

Susan Luschas, Richard Schreier, Hae-Seung Lee

IEEE J. Solid State Circuits, 2004

2003

Output impedance requirements for DACs.

Susan Luschas, Hae-Seung Lee

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 942 MHz output, 17.5 MHz bandwidth, -70dBc IMD3 ΣΔ DAC.

Susan Luschas, Richard Schreier, Hae-Seung Lee

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

Oversampled pipeline A/D converters with mismatch shaping.

Ayman Shabra, Hae-Seung Lee

IEEE J. Solid State Circuits, 2002

Superconducting bandpass ΔΣ modulator with 2.23-GHz center frequency and 42.6-GHz sampling rate.

John F. Bulzacchelli, Hae-Seung Lee, James A. Misewich, Mark B. Ketchen

IEEE J. Solid State Circuits, 2002

2001

A low-power reconfigurable analog-to-digital converter.

Kush Gulati, Hae-Seung Lee

IEEE J. Solid State Circuits, 2001

2000

Corrections to "a high-swing CMOS telescopic operational amplifier".

Kush Gulati, Hae-Seung Lee

IEEE J. Solid State Circuits, 2000

1999

A Nyquist-rate pipelined oversampling A/D converter.

Susanne A. Paul, Hae-Seung Lee, John Goodrich, Titiimaea F. Alailima, Daniel D. Santiago

IEEE J. Solid State Circuits, 1999

1998

A mixed-signal array processor with early vision applications.

David A. Martin, Hae-Seung Lee, Ichiro Masaki

IEEE J. Solid State Circuits, 1998

A high-swing CMOS telescopic operational amplifier.

Kush Gulati, Hae-Seung Lee

IEEE J. Solid State Circuits, 1998

Estimating the Focus of Expansion in Analog VLSI.

Ignacio S. McQuirk, Berthold K. P. Horn, Hae-Seung Lee, John L. Wyatt Jr.

Int. J. Comput. Vis., 1998

1996

A 2.5-V, 12-b, 5-MSample/s pipelined CMOS ADC.

Paul C. Yu, Hae-Seung Lee

IEEE J. Solid State Circuits, 1996

A 9-b charge-to-digital converter for integrated image sensors.

Susanne A. Paul, Hae-Seung Lee

IEEE J. Solid State Circuits, 1996

1994

16-channel oversampled analog-to-digital converter.

S. Nadeem, Charles G. Sodini, Hae-Seung Lee

IEEE J. Solid State Circuits, September, 1994

A 12-b 600 ks/s digitally self-calibrated pipelined algorithmic ADC.

Hae-Seung Lee

IEEE J. Solid State Circuits, April, 1994

A 300-MHz BiCMOS serial data transceiver.

Barry Thompson, Hae-Seung Lee, Lawrence M. DeVito

IEEE J. Solid State Circuits, March, 1994

Characterization, modeling, and minimization of transient threshold voltage shifts in MOSFETs.

Theodore L. Tewksbury, Hae-Seung Lee

IEEE J. Solid State Circuits, March, 1994

1992

Analog VLSI systems for image acquisition and fast early vision processing.

John L. Wyatt Jr., Craig Keast, Mark Seidel, David L. Standley, Berthold K. P. Horn, Tom Knight, Charles G. Sodini, Hae-Seung Lee, Tomaso A. Poggio

Int. J. Comput. Vis., 1992

1989

A 200-MHz CMOS phase-locked loop with dual phase detectors.

Kurt M. Ware, Hae-Seung Lee, Charles G. Sodini

IEEE J. Solid State Circuits, December, 1989

The effects of oxide traps on the large-signal transient response of analog MOS circuits.

Theodore L. Tewksbury, Hae-Seung Lee, Gerald A. Miller

IEEE J. Solid State Circuits, April, 1989

1988

A digital readout technique for capacitive sensor applications.

Joseph T. Kung, Hae-Seung Lee, Roger T. Howe

IEEE J. Solid State Circuits, August, 1988

A high-speed CMOS comparator for use in an ADC.

Benjamin J. McCarroll, Charles G. Sodini, Hae-Seung Lee

IEEE J. Solid State Circuits, February, 1988