Hachiro Yamada

According to our database1, Hachiro Yamada authored at least 10 papers between 1987 and 1997.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1997
Floating-point datapaths with online built-in self speed test.
IEEE J. Solid State Circuits, 1997

1996
A GHz MOS adaptive pipeline technique using MOS current-mode logic.
IEEE J. Solid State Circuits, 1996

A 1-Mb 2-Tr/b nonvolatile CAM based on flash memory technologies.
IEEE J. Solid State Circuits, 1996

1995
Cache-processor coupling: a fast and wide on-chip data cache design.
IEEE J. Solid State Circuits, April, 1995

1994
A 500 MHz, 32 bit, 0.4 μm CMOS RISC processor.
IEEE J. Solid State Circuits, December, 1994

A 300-MHz 16-b 0.5-μm BiCMOS digital signal processor core LSI.
IEEE J. Solid State Circuits, March, 1994

1990
A 1.2-million transistor, 33-MHz, 20-b dictionary search processor (DISP) ULSI with a 160-kb CAM.
IEEE J. Solid State Circuits, October, 1990

1989
A 200-MHz 16-bit super high-speed signal processor (SSSP) LSI.
IEEE J. Solid State Circuits, December, 1989

1988
A versatile data string-search VLSI.
IEEE J. Solid State Circuits, April, 1988

1987
Intelligent String Search Processor to Accelerate Text Information Retrieval.
Proceedings of the Database Machines and Knowledge Base Machines, 1987


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